- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1581 cc03376c-175c-47c8-b038-4cd826a8556b

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jens

2021-03-29 16:29:02 +00:00

parent 1ddbed0820

commit e8863e01ba

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lib/SDRAM/ddr_sdr_v1_5/src/sdr_clk_cycloneive.vhd → lib/SDRAM/ddr_sdr_v1_5/src/clock/altera/sdr_clk_cycloneive.vhd

lib/SDRAM/ddr_sdr_v1_5/src/ddr_clk_virtex4.vhd → lib/SDRAM/ddr_sdr_v1_5/src/clock/xilinx/ddr_clk_virtex4.vhd

lib/SDRAM/ddr_sdr_v1_5/src/sdr_phy_de0nano.vhd → lib/SDRAM/ddr_sdr_v1_5/src/phy/altera/sdr_phy_de0nano.vhd

lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd → lib/SDRAM/ddr_sdr_v1_5/src/phy/xilinx/ddr_phy_virtex4.vhd

lib/SDRAM/ddr_sdr_v1_5/src/sdr_phy_virtex4.vhd → lib/SDRAM/ddr_sdr_v1_5/src/phy/xilinx/sdr_phy_virtex4.vhd