[EMAC]

- fixes due to dpram changes
- testbench has less delay

git-svn-id: http://moon:8086/svn/vhdl/trunk@1115 cc03376c-175c-47c8-b038-4cd826a8556b

lib/emac/src/emac_rx.vhd

@@ -62,12 +62,10 @@ ARCHITECTURE behavior OF emac_rx IS
 	signal xfer_vld			: std_logic;
 	signal xfer_promiscious	: std_logic;
 
-	signal ram_en_a			: std_logic;
 	signal ram_we_a			: std_logic;
 	signal ram_addr_a		: word_ptr_t;
 	signal ram_din_a		: unsigned(31 downto 0);
 	signal ram_dout_b		: unsigned(31 downto 0);
-	signal ram_en_b			: std_logic;
 	signal ram_addr_b		: word_ptr_t;
 
 	signal sipo32_din		: unsigned(7 downto 0);
@@ -143,10 +141,8 @@ begin
 	
 	dout					<= ram_dout_b;
 
-	ram_en_b				<= '1';
 	ram_addr_b				<= host_ptr_next;
 
-	ram_en_a				<= '1';
 	ram_din_a				<= sipo32_dout;
 	ram_addr_a				<= xfer_ptr;
 	ram_we_a				<= xfer_en and sipo32_dout_vld;
@@ -456,9 +452,8 @@ inst_ram : entity work.dpram_1w1r2c_ro
 	(
 		clk_a		=> mii_rx_clk,
 		clk_b		=> clk,
-		en_a		=> ram_en_a,
-		en_b		=> ram_en_b,
 		we_a		=> ram_we_a,
+		re_b		=> '1',
 		addr_a		=> ram_addr_a,
 		addr_b		=> ram_addr_b,
 		din_a		=> ram_din_a,