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[EMAC]

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- fixes due to dpram changes
- testbench has less delay

git-svn-id: http://moon:8086/svn/vhdl/trunk@1115 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2015-05-17 18:56:21 +00:00
parent bd3aa8c06e
commit e691b4429b
3 changed files with 8 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/emac/src/emac_rx.vhd
+1 -6
View File
@@ -62,12 +62,10 @@ ARCHITECTURE behavior OF emac_rx IS
signal xfer_vld : std_logic;
signal xfer_promiscious : std_logic;
signal ram_en_a : std_logic;
signal ram_we_a : std_logic;
signal ram_addr_a : word_ptr_t;
signal ram_din_a : unsigned(31 downto 0);
signal ram_dout_b : unsigned(31 downto 0);
signal ram_en_b : std_logic;
signal ram_addr_b : word_ptr_t;
signal sipo32_din : unsigned(7 downto 0);
@@ -143,10 +141,8 @@ begin
dout <= ram_dout_b;
ram_en_b <= '1';
ram_addr_b <= host_ptr_next;
ram_en_a <= '1';
ram_din_a <= sipo32_dout;
ram_addr_a <= xfer_ptr;
ram_we_a <= xfer_en and sipo32_dout_vld;
@@ -456,9 +452,8 @@ inst_ram : entity work.dpram_1w1r2c_ro
(
clk_a => mii_rx_clk,
clk_b => clk,
en_a => ram_en_a,
en_b => ram_en_b,
we_a => ram_we_a,
re_b => '1',
addr_a => ram_addr_a,
addr_b => ram_addr_b,
din_a => ram_din_a,
lib/emac/src/emac_tx.vhd
+2 -7
View File
@@ -77,11 +77,9 @@ ARCHITECTURE behavior OF emac_tx IS
signal xfer_bsy : std_logic;
signal xfer_free_en : std_logic;
signal ram_en_a : std_logic;
signal ram_we_a : std_logic;
signal ram_addr_a : word_ptr_t;
signal ram_din_a : unsigned(35 downto 0);
signal ram_en_b : std_logic;
signal ram_addr_b : word_ptr_t;
signal ram_dout_b : unsigned(35 downto 0);
@@ -151,8 +149,7 @@ begin
ctrl_out.pkt_done <= cmd_fifo_empty;
ctrl_out.reset_busy <= reset_en;
ram_en_a <= din_vld;
ram_we_a <= fill_bsy;
ram_we_a <= din_vld and fill_bsy;
ram_din_a(31 downto 0) <= din;
ram_din_a(35 downto 32) <= piso_byte_mask_rom(to_integer(fill_remain)) when fill_pre_rdy = '1' else "1111";
ram_addr_a <= fill_ptr;
@@ -163,7 +160,6 @@ begin
cmd_fifo_we <= commit_en;
cmd_fifo_re <= uncommit_en;
cmd_fifo_din <= fill_size & fill_base;
ram_en_b <= piso32_din_rdy;
ram_addr_b <= xfer_ptr;
reset_en <= reset_pipe(reset_pipe'left);
@@ -572,9 +568,8 @@ inst_ram : entity work.dpram_1w1r2c_ro
(
clk_a => clk,
clk_b => mii_tx_clk,
en_a => ram_en_a,
en_b => ram_en_b,
we_a => ram_we_a,
re_b => piso32_din_rdy,
addr_a => ram_addr_a,
addr_b => ram_addr_b,
din_a => ram_din_a,
lib/emac/src/tb_emac_top_jb.vhd
+5 -4
View File
@@ -523,16 +523,17 @@ STIMULUS: process
emac_alloc (1004);
emac_alloc (1004);
for i in 1 to 10 loop
for j in 1 to 100 loop
for i in 1 to 1 loop
for j in 1 to 10 loop
emac_alloc (72);
emac_write (72);
end loop;
wait for 1 ms;
end loop;
wait for 60*CLK_PERIOD;
wait until rising_edge(mii_tx_clk) and mii_tx_en = '0';
wait for 6000*CLK_PERIOD;
loop_back_en <= '1';
@@ -632,7 +633,7 @@ STIMULUS: process
emac_read (0);
emac_free;
wait for 6000*CLK_PERIOD;
wait for 60*CLK_PERIOD;
loop_back_en <= '0';
pktgen_en <= '1';