Introduced J-Bus
git-svn-id: http://moon:8086/svn/vhdl/trunk@27 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -6,14 +6,16 @@ vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_instr.vhd"
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vhdl work "../../../../lib/misc/dpram_2w2r_virtex4.vhd"
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vhdl work "../../../../lib/misc/dpram_1w1r_dist.vhd"
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vhdl work "../../../../lib/misc/dpram_1w1r.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd"
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vhdl work "../../../../lib/FIFO/src/sync_fifo_ctrl.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/clockgen_virtex4.vhd"
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vhdl work "../../../../lib/uart/kcuart_tx.vhd"
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vhdl work "../../../../lib/uart/kcuart_rx.vhd"
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vhdl work "../../../../lib/uart/bbfifo_16x8.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/fifo_sync.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_shifter.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_reg.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_muldiv.vhd"
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@@ -23,17 +25,21 @@ vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_bcu.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_alu.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/icache.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/dcache.vhd"
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vhdl work "../../../../lib/uart/kcuart_tx.vhd"
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vhdl work "../../../../lib/uart/kcuart_rx.vhd"
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vhdl work "../../../../lib/uart/bbfifo_16x8.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_pipeline.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_bui.vhd"
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vhdl work "../../src/sys_types.vhd"
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vhdl work "../../src/ram_ld.vhd"
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vhdl work "../../src/bootloader.ROM_ld.vhd"
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vhdl work "../../../../lib/uart/uart_tx.vhd"
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vhdl work "../../../../lib/uart/uart_rx.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_pipeline.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_bui.vhd"
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vhdl work "../../src/rom_wb.vhd"
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vhdl work "../../src/ram_wb.vhd"
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vhdl work "../../src/gpio_wb.vhd"
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vhdl work "../../../../lib/uart/uart_wb.vhd"
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vhdl work "../../../../lib/misc/lcd_port.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd"
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vhdl work "../../../../lib/misc/clockgen_virtex4.vhd"
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vhdl work "../../../../lib/misc/async_port_wb.vhd"
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vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd"
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vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_top.vhd"
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vhdl work "../../src/mips_sys.vhd"
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@@ -6,14 +6,16 @@ vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_instr.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_2w2r_virtex4.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_1w1r_dist.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_1w1r.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_types.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_types.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\sync_fifo_ctrl.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_ctrl.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_cmd.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\reset_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\fifo_sync.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\ddr_phy_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\clockgen_virtex4.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_tx.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_rx.vhd"
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vhdl work "W:\vhdl\lib\uart\bbfifo_16x8.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_cmd.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\reset_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\fifo_sync.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\ddr_phy_virtex4.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_shifter.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_reg.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_muldiv.vhd"
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@@ -23,17 +25,21 @@ vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bcu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_alu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\icache.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\dcache.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_tx.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_rx.vhd"
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vhdl work "W:\vhdl\lib\uart\bbfifo_16x8.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_ctrl_top.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_pipeline.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bui.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\sys_types.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\ram_ld.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\bootloader.ROM_ld.vhd"
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vhdl work "W:\vhdl\lib\uart\uart_tx.vhd"
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vhdl work "W:\vhdl\lib\uart\uart_rx.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_pipeline.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bui.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\rom_wb.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\ram_wb.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\gpio_wb.vhd"
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vhdl work "W:\vhdl\lib\uart\uart_wb.vhd"
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vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_ctrl_frontend.vhd"
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vhdl work "W:\vhdl\lib\misc\clockgen_virtex4.vhd"
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vhdl work "W:\vhdl\lib\misc\async_port_wb.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend_wb.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_top.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\mips_sys.vhd"
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@@ -8,9 +8,9 @@ vcom -explicit -93 "../src/sdram_config_sim.vhd"
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vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_types.vhd"
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vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_instr.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd"
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vcom -explicit -93 "../../../lib/misc/utils_pkg.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/mt46v16m16.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/mt46v16m16.vhd"
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# RAMs
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vcom -explicit -93 "../../../lib/misc/dpram_2w2r.vhd"
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@@ -32,6 +32,8 @@ vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_bui.vhd"
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vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_top.vhd"
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vcom -explicit -93 "../src/ram_sim.vhd"
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vcom -explicit -93 "../src/bootloader.ROM.vhd"
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vcom -explicit -93 "../src/ram_wb.vhd"
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vcom -explicit -93 "../src/rom_wb.vhd"
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# UART
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vcom -explicit -93 "../../../lib/uart/bbfifo_16x8.vhd"
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@@ -39,23 +41,31 @@ vcom -explicit -93 "../../../lib/uart/kcuart_rx.vhd"
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vcom -explicit -93 "../../../lib/uart/kcuart_tx.vhd"
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vcom -explicit -93 "../../../lib/uart/uart_rx.vhd"
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vcom -explicit -93 "../../../lib/uart/uart_tx.vhd"
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vcom -explicit -93 "../../../lib/uart/uart_wb.vhd"
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# GPIO
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vcom -explicit -93 "../src/gpio_wb.vhd"
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# LCD
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vcom -explicit -93 "../../../lib/misc/lcd_port.vhd"
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# Flash and USB
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vcom -explicit -93 "../src/sys_types.vhd"
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vcom -explicit -93 "../../../lib/misc/async_port_wb.vhd"
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# FIFOS
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vcom -explicit -93 "../../../lib/FIFO/src/gray_counter.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/sync_fifo_ctrl.vhd"
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# SDRAM
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/clockgen_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_frontend.vhd"
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vcom -explicit -93 "../../../lib/misc/clockgen_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/fifo_sync.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd"
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# Top and TB
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vcom -explicit -93 "../src/mips_sys_sim.vhd"
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@@ -13,6 +13,7 @@ add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_e
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add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_rs
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add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_rw
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add wave -noupdate -format Logic /tb_mips_sys/refresh
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_fb
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_p
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_n
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_cke_q
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@@ -26,12 +27,61 @@ add wave -noupdate -format Literal /tb_mips_sys/sys_sdr_ba_q
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add wave -noupdate -format Literal /tb_mips_sys/sys_sdr_a_q
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add wave -noupdate -format Literal /tb_mips_sys/sys_sdr_data
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add wave -noupdate -format Literal /tb_mips_sys/sys_error
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_fb
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/dat_i
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/dat_o
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/addr_o
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add wave -noupdate -format Literal /tb_mips_sys/uut/sel_o
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add wave -noupdate -format Logic /tb_mips_sys/uut/we_o
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add wave -noupdate -format Logic /tb_mips_sys/uut/cyc_o
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add wave -noupdate -format Logic /tb_mips_sys/uut/stb_o
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add wave -noupdate -format Logic /tb_mips_sys/uut/ack_i
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add wave -noupdate -format Logic /tb_mips_sys/uut/srdy_i
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add wave -noupdate -format Logic /tb_mips_sys/uut/mrdy_o
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add wave -noupdate -format Literal /tb_mips_sys/uut/mem_area
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add wave -noupdate -divider BUI
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s_ca
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcache_busy2
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_rdy
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcache_busy1
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval
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add wave -noupdate -format Literal -label .addr -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval.addr
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add wave -noupdate -format Literal -label .dout -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval.dout
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add wave -noupdate -format Logic -label .en -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval.en
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add wave -noupdate -format Logic -label .re -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval.re
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add wave -noupdate -format Literal -label .we -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/bui_eval.we
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_re
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_en
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_addr
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add wave -noupdate -divider USB
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s
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add wave -noupdate -format Literal -label .op -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/ex_stage.op
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add wave -noupdate -format Logic /tb_mips_sys/sys_usb_rstn
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_usb_d
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_usb_a
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add wave -noupdate -format Logic /tb_mips_sys/sys_usb_csn
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add wave -noupdate -format Logic /tb_mips_sys/sys_usb_wrn
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add wave -noupdate -format Logic /tb_mips_sys/sys_usb_rdn
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add wave -noupdate -format Logic /tb_mips_sys/sys_usb_int
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_usb_port/s
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add wave -noupdate -divider Flash
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_flash_port/as
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_flash_port/s
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_flash_d
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_flash_a
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add wave -noupdate -format Logic /tb_mips_sys/sys_flash_ce
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add wave -noupdate -format Logic /tb_mips_sys/sys_flash_wrn
|
||||
add wave -noupdate -format Logic /tb_mips_sys/sys_flash_rdn
|
||||
add wave -noupdate -format Logic /tb_mips_sys/sys_flash_rstn
|
||||
add wave -noupdate -divider {MIPS TOP}
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/hdu
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/events
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_wait
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/status
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/epc
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/cause
|
||||
@@ -45,18 +95,15 @@ add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/in
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/din
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/dout
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/stat_reg_we
|
||||
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_in
|
||||
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_in
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/exc_state
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/eflags_reg_we
|
||||
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/eflags
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/eflags
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_run
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
|
||||
add wave -noupdate -format Logic -label .exc_commit /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_commit
|
||||
add wave -noupdate -format Logic -label .exc_pending /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_pending
|
||||
add wave -noupdate -format Logic -label .exc_exit /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_exit
|
||||
@@ -67,55 +114,21 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/run_en
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_rst
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/ex_stage
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_busy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_rdy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcache_busy1
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcache_busy2
|
||||
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/mem_stage
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/wb_stage
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/status
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/exception
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/cause
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/epc
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/rst
|
||||
add wave -noupdate -divider BUI
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_re
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_addr
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcache_req
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/mem_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_addr
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/bus_req
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dmem_ack
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dmem_valid
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_rdy
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s
|
||||
add wave -noupdate -divider {Memory Bus}
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/mem_en
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/mem_re
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/mem_re_r
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/mem_we_r
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_re
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_we
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_ce
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_din
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_dout
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_valid
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/mem_rdy
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend/busy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend/en
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend/r_wn
|
||||
add wave -noupdate -divider {CPU DMEM}
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/contention
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_busy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_rdy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_en
|
||||
@@ -125,7 +138,7 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_din
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_dmem_addr
|
||||
add wave -noupdate -divider {CPU IMEM}
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_imem_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_imem_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_imem_din
|
||||
@@ -136,16 +149,9 @@ add wave -noupdate -format Logic /tb_mips_sys/sys_user_rom_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_user_rom_din
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_user_rom_addr
|
||||
add wave -noupdate -divider UUT
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/pc
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/sdr_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/sdr_buf_in
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sdr_busy_q
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/sdr_udata_in
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/sdr_udata_out_q
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sdr_udata_req_wr
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sdr_udata_vld_q
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/st
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/sys_sdr_a_q
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/sys_sdr_ba_q
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_sdr_cas_qn
|
||||
@@ -159,15 +165,12 @@ add wave -noupdate -format Literal /tb_mips_sys/uut/sys_sdr_dm_q
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/sys_sdr_dqs_q
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_sdr_ras_qn
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_sdr_we_qn
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/tick_usec
|
||||
add wave -noupdate -divider I-Cache
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_rst
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_wait
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/run_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/pc
|
||||
add wave -noupdate -format Logic -label .branch -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/ex_stage.ctrl.branch
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/clk
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/s
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/s
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/cpu_en
|
||||
@@ -177,13 +180,6 @@ add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_ic
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/cache_miss
|
||||
add wave -noupdate -format Literal -label tag_ram -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/inst_tag_ram/ram
|
||||
add wave -noupdate -format Literal -label data_ram -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/inst_data_ram/ram
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_req
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_gnt
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_din
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_valid
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_rdy
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/data_ram_addr_rd
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/data_ram_addr_wr
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/data_ram_we
|
||||
@@ -191,6 +187,7 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/mem_index_count
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_icache/data_write
|
||||
add wave -noupdate -divider D-Cache
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_en
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_r_wn
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_we
|
||||
@@ -198,13 +195,6 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_din
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_dout
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_busy
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_req
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_gnt
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_en
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_addr
|
||||
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_din
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_valid
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/mem_rdy
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/s
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cache_read_miss
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cache_write_miss
|
||||
@@ -224,9 +214,8 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/ctrl_dram_we
|
||||
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/cpu_dram_we
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/dcached
|
||||
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/duncached_access
|
||||
TreeUpdate [SetDefaultTree]
|
||||
WaveRestoreCursors {{Cursor 2} {49999842932 ps} 0} {{Cursor 100} {1165623518 ps} 0}
|
||||
WaveRestoreCursors {{Cursor 2} {49999842932 ps} 0} {{Cursor 100} {1129563255 ps} 0}
|
||||
configure wave -namecolwidth 218
|
||||
configure wave -valuecolwidth 100
|
||||
configure wave -justifyvalue left
|
||||
@@ -240,4 +229,4 @@ configure wave -gridperiod 100
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 1
|
||||
update
|
||||
WaveRestoreZoom {1165509887 ps} {1165713125 ps}
|
||||
WaveRestoreZoom {1129448646 ps} {1129766075 ps}
|
||||
|
||||
+1174
-1174
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1107
-1017
File diff suppressed because it is too large
Load Diff
+510
-511
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -74,7 +74,24 @@ ARCHITECTURE behavior OF tb_mips_sys IS
|
||||
signal sys_user_rom_en : std_logic;
|
||||
signal sys_user_rom_din : word_t;
|
||||
signal sys_user_rom_addr : word_t;
|
||||
|
||||
signal sys_usb_d : unsigned(15 downto 0) := (others => '0');
|
||||
signal sys_usb_a : unsigned(1 downto 0);
|
||||
signal sys_usb_csn : std_logic;
|
||||
signal sys_usb_wrn : std_logic;
|
||||
signal sys_usb_rdn : std_logic;
|
||||
signal sys_usb_rstn : std_logic;
|
||||
signal sys_usb_int : std_logic := '0';
|
||||
|
||||
signal sys_flash_d : word_t;
|
||||
signal sys_flash_a : unsigned(24 downto 0);
|
||||
signal sys_flash_ce : std_logic;
|
||||
signal sys_flash_wrn : std_logic;
|
||||
signal sys_flash_rdn : std_logic;
|
||||
signal sys_flash_rstn : std_logic;
|
||||
signal sys_flash_byten : std_logic;
|
||||
signal flash_reg : word_t;
|
||||
|
||||
type urom_data_t is array (natural range 0 to 2**(UROM_ADDR_WIDTH-2)-1) of word_t;
|
||||
signal urom_data : urom_data_t;
|
||||
|
||||
@@ -120,6 +137,23 @@ uut: entity work.mips_sys
|
||||
sys_sdr_ba_q => sys_sdr_ba_q,
|
||||
sys_sdr_a_q => sys_sdr_a_q,
|
||||
sys_sdr_data => sys_sdr_data,
|
||||
|
||||
sys_usb_d => sys_usb_d,
|
||||
sys_usb_a => sys_usb_a,
|
||||
sys_usb_csn => sys_usb_csn,
|
||||
sys_usb_wrn => sys_usb_wrn,
|
||||
sys_usb_rdn => sys_usb_rdn,
|
||||
sys_usb_rstn => sys_usb_rstn,
|
||||
sys_usb_int => sys_usb_int,
|
||||
|
||||
sys_flash_d => sys_flash_d,
|
||||
sys_flash_a => sys_flash_a,
|
||||
sys_flash_ce => sys_flash_ce,
|
||||
sys_flash_wrn => sys_flash_wrn,
|
||||
sys_flash_rdn => sys_flash_rdn,
|
||||
sys_flash_rstn => sys_flash_rstn,
|
||||
sys_flash_byten => sys_flash_byten,
|
||||
|
||||
sys_error => sys_error
|
||||
);
|
||||
|
||||
@@ -160,6 +194,7 @@ uut: entity work.mips_sys
|
||||
sys_sdr_clk_fb <= sys_sdr_clk_p after 2300 ps;
|
||||
refresh <= true when falling_edge(sys_sdr_ras_qn) and falling_edge(sys_sdr_cas_qn) and sys_sdr_we_qn='1' else false;
|
||||
|
||||
sys_usb_d <= X"1234" after 20 ns when sys_usb_csn = '0' and sys_usb_rdn = '0' else (others => 'Z') after 5 ns;
|
||||
CLK_GEN: process
|
||||
begin
|
||||
wait for CLK_PERIOD/2;
|
||||
@@ -187,6 +222,21 @@ UROM_READ: process(sys_rst_n_in, sys_user_rom_clk)
|
||||
end if;
|
||||
end process;
|
||||
|
||||
FLASH_WRITE: process(sys_flash_ce, sys_flash_wrn, sys_flash_d)
|
||||
begin
|
||||
if rising_edge(sys_flash_wrn) and sys_flash_ce = '1' then
|
||||
flash_reg <= sys_flash_d;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
FLASH_READ: process(sys_flash_ce, sys_flash_rdn, flash_reg)
|
||||
begin
|
||||
sys_flash_d <= (others => 'Z') after 10 ns;
|
||||
if sys_flash_rdn = '0' and sys_flash_ce = '1' then
|
||||
sys_flash_d <= flash_reg after 10 ns;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
STIMULUS: process
|
||||
|
||||
begin
|
||||
|
||||
Reference in New Issue
Block a user