jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- turned all sys_clk-related async. resets to sys_clk synchronous resets

Browse Source 
- scroll-disable when cursor y-pos was set

Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@633 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-07 15:00:51 +00:00
parent 1cd391f0bc
commit da76ef5d48
1 changed files with 30 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/VGA_ctrl/src/char_gen.vhd
+30 -38
View File
@@ -192,7 +192,7 @@ architecture Behavioral of char_gen is
signal csr_posy_synced : natural range 0 to MAX_LINE_PER_FRAME-1; signal csr_posy_synced : natural range 0 to MAX_LINE_PER_FRAME-1;
-- Scrolling -- Scrolling
signal scroll_offset : natural range 0 to MAX_CHAR_PER_LINE-1; signal scroll_offset : natural range 0 to MAX_LINE_PER_FRAME-1;
signal scroll_active : std_logic; signal scroll_active : std_logic;
@@ -283,21 +283,21 @@ begin
end case; end case;
end process; end process;
asci_ram_fsm_next: process (rst, sys_clk) asci_ram_fsm_next: process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
s <= cg_init; if rst = '1' then
elsif rising_edge(sys_clk) then s <= cg_init;
s <= sn; else
s <= sn;
end if;
end if; end if;
end process; end process;
--------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------
asci_ram_cnt: process (rst, sys_clk) asci_ram_cnt: process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
a_cnt <= 0;
elsif rising_edge(sys_clk) then
if a_cnt_rst = '1' then if a_cnt_rst = '1' then
a_cnt <= 0; a_cnt <= 0;
elsif a_cnt_en = '1' then elsif a_cnt_en = '1' then
@@ -309,22 +309,17 @@ begin
end process; end process;
--------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------
asci_addr_reg: process (rst, sys_clk) asci_addr_reg: process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
csr_posx_cnt_en <= '0';
csr_posx_cnt_set <= '0';
csr_posy_cnt_en <= '0';
csr_posy_cnt_set <= '0';
a_data_reg <= (others => '0');
a_data_we <= '0';
elsif rising_edge(sys_clk) then
a_data_we <= '0'; a_data_we <= '0';
csr_posx_cnt_en <= '0'; csr_posx_cnt_en <= '0';
csr_posx_cnt_set <= '0'; csr_posx_cnt_set <= '0';
csr_posy_cnt_en <= '0'; csr_posy_cnt_en <= '0';
csr_posy_cnt_set <= '0'; csr_posy_cnt_set <= '0';
if posy_we = '1' then if rst = '1' then
a_data_reg <= (others => '0');
elsif posy_we = '1' then
csr_posy_cnt_din <= to_integer(din); csr_posy_cnt_din <= to_integer(din);
csr_posy_cnt_set <= '1'; csr_posy_cnt_set <= '1';
elsif posx_we = '1' then elsif posx_we = '1' then
@@ -349,14 +344,13 @@ begin
end process; end process;
asci_csr_posx_counter: asci_csr_posx_counter:
process (rst, sys_clk) process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
csr_posx_reg <= 0;
csr_posx_overflow <= '0'; csr_posx_overflow <= '0';
elsif rising_edge(sys_clk) then if rst = '1' then
csr_posx_overflow <= '0'; csr_posx_reg <= 0;
if csr_posx_cnt_set = '1' then elsif csr_posx_cnt_set = '1' then
csr_posx_reg <= csr_posx_cnt_din; csr_posx_reg <= csr_posx_cnt_din;
elsif csr_posx_cnt_en = '1' then elsif csr_posx_cnt_en = '1' then
if csr_posx_reg < MAX_CHAR_PER_LINE-1 then if csr_posx_reg < MAX_CHAR_PER_LINE-1 then
@@ -370,14 +364,13 @@ begin
end process; end process;
asci_csr_posy_counter: asci_csr_posy_counter:
process (rst, sys_clk) process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
csr_posy_reg <= 0;
csr_posy_overflow <= '0'; csr_posy_overflow <= '0';
elsif rising_edge(sys_clk) then if rst = '1' then
csr_posy_overflow <= '0'; csr_posy_reg <= 0;
if csr_posy_cnt_set = '1' then elsif csr_posy_cnt_set = '1' then
csr_posy_reg <= csr_posy_cnt_din; csr_posy_reg <= csr_posy_cnt_din;
elsif csr_posy_cnt_en = '1' or csr_posx_overflow = '1' then elsif csr_posy_cnt_en = '1' or csr_posx_overflow = '1' then
if csr_posy_reg < MAX_LINE_PER_FRAME-1 then if csr_posy_reg < MAX_LINE_PER_FRAME-1 then
@@ -390,15 +383,14 @@ begin
end if; end if;
end process; end process;
scroll_gen: process (rst, sys_clk) scroll_gen: process (sys_clk)
begin begin
if rst = '1' then if rising_edge(sys_clk) then
scroll_offset <= 0; if rst = '1' or clr_screen = '1' then
scroll_active <= '0';
elsif rising_edge(sys_clk) then
if clr_screen = '1' then
scroll_offset <= 0; scroll_offset <= 0;
scroll_active <= '0'; scroll_active <= '0';
elsif csr_posy_cnt_set = '1' then
scroll_active <= '0';
elsif csr_posy_overflow = '1' then elsif csr_posy_overflow = '1' then
scroll_active <= '1'; scroll_active <= '1';
scroll_offset <= 1; scroll_offset <= 1;