diff --git a/lib/VGA_ctrl/src/char_gen.vhd b/lib/VGA_ctrl/src/char_gen.vhd index c9d9970..4dd93b1 100644 --- a/lib/VGA_ctrl/src/char_gen.vhd +++ b/lib/VGA_ctrl/src/char_gen.vhd @@ -192,7 +192,7 @@ architecture Behavioral of char_gen is signal csr_posy_synced : natural range 0 to MAX_LINE_PER_FRAME-1; -- Scrolling - signal scroll_offset : natural range 0 to MAX_CHAR_PER_LINE-1; + signal scroll_offset : natural range 0 to MAX_LINE_PER_FRAME-1; signal scroll_active : std_logic; @@ -283,21 +283,21 @@ begin end case; end process; - asci_ram_fsm_next: process (rst, sys_clk) + asci_ram_fsm_next: process (sys_clk) begin - if rst = '1' then - s <= cg_init; - elsif rising_edge(sys_clk) then - s <= sn; + if rising_edge(sys_clk) then + if rst = '1' then + s <= cg_init; + else + s <= sn; + end if; end if; end process; --------------------------------------------------------------------------------------------- - asci_ram_cnt: process (rst, sys_clk) + asci_ram_cnt: process (sys_clk) begin - if rst = '1' then - a_cnt <= 0; - elsif rising_edge(sys_clk) then + if rising_edge(sys_clk) then if a_cnt_rst = '1' then a_cnt <= 0; elsif a_cnt_en = '1' then @@ -309,22 +309,17 @@ begin end process; --------------------------------------------------------------------------------------------- - asci_addr_reg: process (rst, sys_clk) + asci_addr_reg: process (sys_clk) begin - if rst = '1' then - csr_posx_cnt_en <= '0'; - csr_posx_cnt_set <= '0'; - csr_posy_cnt_en <= '0'; - csr_posy_cnt_set <= '0'; - a_data_reg <= (others => '0'); - a_data_we <= '0'; - elsif rising_edge(sys_clk) then + if rising_edge(sys_clk) then a_data_we <= '0'; csr_posx_cnt_en <= '0'; csr_posx_cnt_set <= '0'; csr_posy_cnt_en <= '0'; csr_posy_cnt_set <= '0'; - if posy_we = '1' then + if rst = '1' then + a_data_reg <= (others => '0'); + elsif posy_we = '1' then csr_posy_cnt_din <= to_integer(din); csr_posy_cnt_set <= '1'; elsif posx_we = '1' then @@ -349,14 +344,13 @@ begin end process; asci_csr_posx_counter: - process (rst, sys_clk) + process (sys_clk) begin - if rst = '1' then - csr_posx_reg <= 0; + if rising_edge(sys_clk) then csr_posx_overflow <= '0'; - elsif rising_edge(sys_clk) then - csr_posx_overflow <= '0'; - if csr_posx_cnt_set = '1' then + if rst = '1' then + csr_posx_reg <= 0; + elsif csr_posx_cnt_set = '1' then csr_posx_reg <= csr_posx_cnt_din; elsif csr_posx_cnt_en = '1' then if csr_posx_reg < MAX_CHAR_PER_LINE-1 then @@ -370,14 +364,13 @@ begin end process; asci_csr_posy_counter: - process (rst, sys_clk) + process (sys_clk) begin - if rst = '1' then - csr_posy_reg <= 0; + if rising_edge(sys_clk) then csr_posy_overflow <= '0'; - elsif rising_edge(sys_clk) then - csr_posy_overflow <= '0'; - if csr_posy_cnt_set = '1' then + if rst = '1' then + csr_posy_reg <= 0; + elsif csr_posy_cnt_set = '1' then csr_posy_reg <= csr_posy_cnt_din; elsif csr_posy_cnt_en = '1' or csr_posx_overflow = '1' then if csr_posy_reg < MAX_LINE_PER_FRAME-1 then @@ -390,15 +383,14 @@ begin end if; end process; - scroll_gen: process (rst, sys_clk) + scroll_gen: process (sys_clk) begin - if rst = '1' then - scroll_offset <= 0; - scroll_active <= '0'; - elsif rising_edge(sys_clk) then - if clr_screen = '1' then + if rising_edge(sys_clk) then + if rst = '1' or clr_screen = '1' then scroll_offset <= 0; scroll_active <= '0'; + elsif csr_posy_cnt_set = '1' then + scroll_active <= '0'; elsif csr_posy_overflow = '1' then scroll_active <= '1'; scroll_offset <= 1;