Initial import
git-svn-id: http://moon:8086/svn/vhdl/trunk@5 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -0,0 +1,546 @@
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--------------------------------------------------------------------------------
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-- Company:
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-- Engineer:
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--
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-- Create Date: 11:25:45 10/15/05
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-- Design Name:
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-- Module Name: char_gen - Behavioral
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-- Project Name:
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-- Target Device:
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-- Tool versions:
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-- Description:
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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--------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.NUMERIC_STD.ALL;
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use work.vga_types.all;
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entity char_gen is
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Generic
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(
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tsvga : vga_timespec_t := ts_vga_800_600_72;
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-- User supplied parameters
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CHARACTER_SCALE : natural := 1;
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CHAR_ROM_SIZE_X : natural := 8; -- Pixels
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CHAR_ROM_SIZE_Y : natural := 16; -- Pixels
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CHAR_ROM_DEPTH : natural := 256; -- Chars
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MAX_CHAR_PER_LINE : natural := 32; -- Chars
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MAX_LINE_PER_FRAME : natural := 16; -- Chars
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CHAR_SPACING_X : natural := 0; -- Pixels
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CHAR_SPACING_Y : natural := 0; -- Pixels
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SCREEN_OFFSET_X : natural := 16; -- Pixels
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SCREEN_OFFSET_Y : natural := 16 -- Pixels
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);
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Port
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(
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-- System signals
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rst : in std_logic;
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vga_clk : in std_logic;
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sys_clk : in std_logic;
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ce : in std_logic;
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frame_pulse : in std_logic;
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-- Host Signals
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clr_screen : in std_logic;
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clr_line : in std_logic;
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ascii_data : in unsigned(7 downto 0);
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ascii_data_we : in std_logic;
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ascii_posy_we : in std_logic;
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ascii_posx_we : in std_logic;
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ready : out std_logic;
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-- Control signals
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pos_x : in natural range 0 to tsvga.ts_h.ncyc_scan-1;
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pos_y : in natural range 0 to tsvga.ts_v.ncyc_scan-1;
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-- Output
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char_draw_en : out std_logic
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);
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end char_gen;
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architecture Behavioral of char_gen is
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constant A_RAM_ADDR_WIDTH : integer := 12;
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constant A_RAM_DATA_WIDTH : integer := 8;
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type offset_rom_t is array (0 to MAX_LINE_PER_FRAME-1) of unsigned(A_RAM_ADDR_WIDTH-1 downto 0);
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function gen_offset_rom(num_char_per_line, num_lines : natural) return offset_rom_t is
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variable result : offset_rom_t;
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variable offset : unsigned(A_RAM_ADDR_WIDTH-1 downto 0) := (others => '0');
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begin
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for i in 0 to num_lines-1 loop
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result(i) := offset;
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offset := offset + to_unsigned(num_char_per_line, A_RAM_ADDR_WIDTH-1);
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end loop;
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return result;
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end gen_offset_rom;
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constant offset_rom : offset_rom_t := gen_offset_rom(MAX_CHAR_PER_LINE, MAX_LINE_PER_FRAME);
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-- Calculated parameters
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type cg_state_t is (cg_init, cg_ready, cg_clr_line, cg_clr_screen);
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signal s, sn : cg_state_t;
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constant CELL_SIZE_X : natural := (CHAR_ROM_SIZE_X+CHAR_SPACING_X)*CHARACTER_SCALE;
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constant CELL_SIZE_Y : natural := (CHAR_ROM_SIZE_Y+CHAR_SPACING_Y)*CHARACTER_SCALE;
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constant CHAR_SIZE_X : natural := CHAR_ROM_SIZE_X*CHARACTER_SCALE;
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constant CHAR_SIZE_Y : natural := CHAR_ROM_SIZE_Y*CHARACTER_SCALE;
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signal line_offset : natural range 0 to MAX_LINE_PER_FRAME-1;
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signal cell_x_cnt : natural range 0 to MAX_CHAR_PER_LINE-1;
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signal cell_y_cnt : natural range 0 to MAX_LINE_PER_FRAME-1;
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signal char_x_cnt : natural range 0 to CELL_SIZE_X-1;
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signal char_y_cnt : natural range 0 to CELL_SIZE_Y-1;
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signal char_rom_row : unsigned(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto 0);
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signal char_rom_addr : unsigned(NextExpBaseTwo(CHAR_ROM_DEPTH*CHAR_ROM_SIZE_Y)-1 downto 0);
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signal char_rom_data : unsigned(CHAR_ROM_SIZE_X-1 downto 0);
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signal char_reg : unsigned((CHARACTER_SCALE*CHAR_ROM_SIZE_X)-1 downto 0);
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signal a_addr_rd : unsigned(A_RAM_ADDR_WIDTH-1 downto 0);
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signal a_addr_wr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0);
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signal a_data_rd : unsigned(A_RAM_DATA_WIDTH-1 downto 0);
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signal a_data_wr : unsigned(A_RAM_DATA_WIDTH-1 downto 0);
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signal a_ram_we : std_logic;
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signal a_cnt : natural range 0 to 2**A_RAM_ADDR_WIDTH-1;
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signal a_cnt_rst : std_logic;
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signal a_cnt_en : std_logic;
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signal csr_posx_reg : natural range 0 to MAX_CHAR_PER_LINE-1;
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signal csr_posy_reg : natural range 0 to MAX_LINE_PER_FRAME-1;
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signal a_data_reg : unsigned(A_RAM_DATA_WIDTH-1 downto 0);
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signal a_data_we : std_logic;
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signal csr_posx_overflow : std_logic;
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signal csr_posx_cnt_din : natural range 0 to MAX_CHAR_PER_LINE-1;
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signal csr_posx_cnt_set : std_logic;
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signal csr_posx_cnt_en : std_logic;
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signal csr_posy_overflow : std_logic;
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signal csr_posy_cnt_din : natural range 0 to MAX_LINE_PER_FRAME-1;
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signal csr_posy_cnt_set : std_logic;
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signal csr_posy_cnt_en : std_logic;
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signal line_addr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0);
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signal char_addr : unsigned(A_RAM_ADDR_WIDTH-1 downto 0);
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-- Visible Cursor
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constant CURSOR_BLINK_INTERVAL : natural := tsvga.nfps/2;
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type cursor_rom_t is array (0 to 2*CHAR_ROM_SIZE_Y-1) of unsigned (CHAR_ROM_SIZE_X-1 downto 0);
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constant cursor_rom : cursor_rom_t :=
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(
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-- Cursor off
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"00000000",
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"11111111",
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"11111111",
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"11111111",
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-- Cursor on
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"00000000",
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"00000000",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"11111111",
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"00000000",
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"00000000",
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"00000000"
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);
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signal cursor_rom_addr : unsigned(NextExpBaseTwo(2*CHAR_ROM_SIZE_Y)-1 downto 0);
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signal cursor_rom_data : unsigned(CHAR_ROM_SIZE_X-1 downto 0);
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signal cursor_visible : std_logic;
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signal cursor_cnt : natural range 0 to CURSOR_BLINK_INTERVAL-1;
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signal csr_posx_synced : natural range 0 to MAX_CHAR_PER_LINE-1;
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signal csr_posy_synced : natural range 0 to MAX_LINE_PER_FRAME-1;
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-- Scrolling
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signal scroll_offset : natural range 0 to MAX_CHAR_PER_LINE-1;
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signal scroll_active : std_logic;
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begin
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a_addr_rd <= to_unsigned(cell_x_cnt, a_addr_rd'length) + offset_rom(line_offset);
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line_addr <= offset_rom(csr_posy_reg);
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char_addr <= to_unsigned(csr_posx_reg, char_addr'length);
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char_rom_addr <= a_data_rd & char_rom_row(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto (CHARACTER_SCALE-1));
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cursor_rom_addr <= cursor_visible & char_rom_row(NextExpBaseTwo(CHAR_SIZE_Y)-1 downto (CHARACTER_SCALE-1));
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inst_char_rom : entity work.char_rom
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PORT MAP
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(
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CLK => vga_clk,
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ADDR => char_rom_addr,
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DATA => char_rom_data
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);
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inst_ascii_ram: entity work.dpram
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GENERIC MAP (
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addr_width => A_RAM_ADDR_WIDTH,
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data_width => A_RAM_DATA_WIDTH
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)
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PORT MAP(
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clka => sys_clk,
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clkb => vga_clk,
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en_a => '1',
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en_b => '1',
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we_a => a_ram_we,
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addr_a => a_addr_wr,
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addr_b => a_addr_rd,
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din_a => a_data_wr,
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dout_b => a_data_rd
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);
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---------------------------------------------------------------------------------------------
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--- ASCII RAM control
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---------------------------------------------------------------------------------------------
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asci_ram_fsm:
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process (s, a_cnt, clr_line, clr_screen, a_data_we, a_data_reg, char_addr, line_addr)
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begin
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sn <= s;
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a_cnt_rst <= '0';
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a_cnt_en <= '0';
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a_ram_we <= '0';
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a_data_wr <= a_data_reg;
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a_addr_wr <= char_addr + line_addr;
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ready <= '0';
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case s is
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when cg_init =>
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sn <= cg_clr_screen;
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a_cnt_rst <= '1';
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when cg_ready =>
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ready <= '1';
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a_ram_we <= a_data_we;
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if clr_screen = '1' then
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a_cnt_rst <= '1';
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sn <= cg_clr_screen;
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elsif clr_line = '1' then
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a_cnt_rst <= '1';
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sn <= cg_clr_line;
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end if;
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when cg_clr_line =>
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a_ram_we <= '1';
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a_cnt_en <= '1';
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a_data_wr <= to_unsigned(0, A_RAM_DATA_WIDTH);
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a_addr_wr <= to_unsigned(a_cnt + to_integer(line_addr), A_RAM_ADDR_WIDTH);
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if a_cnt = MAX_CHAR_PER_LINE-1 then
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sn <= cg_ready;
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end if;
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when cg_clr_screen =>
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a_ram_we <= '1';
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a_cnt_en <= '1';
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a_data_wr <= to_unsigned(0, A_RAM_DATA_WIDTH);
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a_addr_wr <= to_unsigned(a_cnt, A_RAM_ADDR_WIDTH);
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if a_cnt = (2**A_RAM_ADDR_WIDTH-1) then
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sn <= cg_ready;
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end if;
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when others =>
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sn <= cg_ready;
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end case;
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end process;
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asci_ram_fsm_next: process (rst, sys_clk)
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begin
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if rst = '1' then
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s <= cg_init;
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elsif rising_edge(sys_clk) then
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s <= sn;
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end if;
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end process;
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---------------------------------------------------------------------------------------------
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asci_ram_cnt: process (rst, sys_clk)
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begin
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if rst = '1' then
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a_cnt <= 0;
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elsif rising_edge(sys_clk) then
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if a_cnt_rst = '1' then
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a_cnt <= 0;
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elsif a_cnt_en = '1' then
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if a_cnt < (2**A_RAM_ADDR_WIDTH-1) then
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a_cnt <= a_cnt + 1;
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end if;
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end if;
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end if;
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end process;
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---------------------------------------------------------------------------------------------
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asci_addr_reg: process (rst, sys_clk)
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begin
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if rst = '1' then
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csr_posx_cnt_en <= '0';
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csr_posx_cnt_set <= '0';
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csr_posy_cnt_en <= '0';
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csr_posy_cnt_set <= '0';
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a_data_reg <= (others => '0');
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a_data_we <= '0';
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elsif rising_edge(sys_clk) then
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a_data_we <= '0';
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csr_posx_cnt_en <= '0';
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csr_posx_cnt_set <= '0';
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csr_posy_cnt_en <= '0';
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csr_posy_cnt_set <= '0';
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if ascii_posy_we = '1' then
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csr_posy_cnt_din <= to_integer(ascii_data);
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csr_posy_cnt_set <= '1';
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elsif ascii_posx_we = '1' then
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csr_posx_cnt_din <= to_integer(ascii_data);
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csr_posx_cnt_set <= '1';
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elsif ascii_data_we = '1' then
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if ascii_data < X"20" then
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if ascii_data = X"0D" then
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csr_posx_cnt_din <= 0;
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csr_posx_cnt_set <= '1';
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elsif ascii_data = X"0A" then
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csr_posy_cnt_en <= '1';
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end if;
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else
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a_data_reg <= ascii_data - X"20";
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a_data_we <= '1';
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csr_posx_cnt_en <= '1';
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end if;
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end if;
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end if;
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end process;
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asci_csr_posx_counter:
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process (rst, sys_clk)
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begin
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if rst = '1' then
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csr_posx_reg <= 0;
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csr_posx_overflow <= '0';
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elsif rising_edge(sys_clk) then
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csr_posx_overflow <= '0';
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if csr_posx_cnt_set = '1' then
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csr_posx_reg <= csr_posx_cnt_din;
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elsif csr_posx_cnt_en = '1' then
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if csr_posx_reg < MAX_CHAR_PER_LINE-1 then
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csr_posx_reg <= csr_posx_reg + 1;
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else
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csr_posx_reg <= 0;
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csr_posx_overflow <= '1';
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end if;
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end if;
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end if;
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end process;
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asci_csr_posy_counter:
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process (rst, sys_clk)
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begin
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if rst = '1' then
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csr_posy_reg <= 0;
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csr_posy_overflow <= '0';
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elsif rising_edge(sys_clk) then
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csr_posy_overflow <= '0';
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if csr_posy_cnt_set = '1' then
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csr_posy_reg <= csr_posy_cnt_din;
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elsif csr_posy_cnt_en = '1' or csr_posx_overflow = '1' then
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if csr_posy_reg < MAX_LINE_PER_FRAME-1 then
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csr_posy_reg <= csr_posy_reg + 1;
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else
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csr_posy_reg <= 0;
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csr_posy_overflow <= '1';
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end if;
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end if;
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end if;
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end process;
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scroll_gen: process (rst, sys_clk)
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begin
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if rst = '1' then
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scroll_offset <= 0;
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scroll_active <= '0';
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elsif rising_edge(sys_clk) then
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if clr_screen = '1' then
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scroll_offset <= 0;
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scroll_active <= '0';
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elsif csr_posy_overflow = '1' then
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scroll_active <= '1';
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scroll_offset <= 1;
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end if;
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if (csr_posy_cnt_en = '1' or csr_posx_overflow = '1') and scroll_active = '1' then
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scroll_offset <= scroll_offset + 1;
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end if;
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end if;
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end process;
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---------------------------------------------------------------------------------------------
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--- Cursor generator
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---------------------------------------------------------------------------------------------
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proc_sync_csr_posx:
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process(vga_clk)
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variable p1, p2 : natural range 0 to MAX_CHAR_PER_LINE-1;
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begin
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if rising_edge(vga_clk) then
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csr_posx_synced <= p2;
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p2 := p1;
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p1 := csr_posx_reg;
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end if;
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end process;
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proc_sync_csr_posy:
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process(vga_clk)
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variable p1, p2 : natural range 0 to MAX_LINE_PER_FRAME-1;
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begin
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if rising_edge(vga_clk) then
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csr_posy_synced <= p2;
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p2 := p1;
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p1 := csr_posy_reg;
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end if;
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end process;
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csr_blink_cnt: process (rst, vga_clk)
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begin
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if rst = '1' then
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cursor_cnt <= 0;
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cursor_visible <= '0';
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elsif rising_edge(vga_clk) then
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if frame_pulse = '1' then
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if cursor_cnt < CURSOR_BLINK_INTERVAL-1 then
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cursor_cnt <= cursor_cnt + 1;
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else
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cursor_cnt <= 0;
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cursor_visible <= not cursor_visible;
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end if;
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end if;
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end if;
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end process;
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||||
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cursor_rom_read: process (vga_clk)
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begin
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if rising_edge(vga_clk) then
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cursor_rom_data <= (others => '0');
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||||
if (cell_x_cnt = csr_posx_synced) and (line_offset = csr_posy_synced) then
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cursor_rom_data <= cursor_rom(to_integer(cursor_rom_addr));
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||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
---------------------------------------------------------------------------------------------
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||||
--- Character generator
|
||||
---------------------------------------------------------------------------------------------
|
||||
char_rom_ctrl: process (vga_clk)
|
||||
begin
|
||||
if rising_edge(vga_clk) then
|
||||
char_rom_row <= to_unsigned(char_y_cnt, char_rom_row'length);
|
||||
end if;
|
||||
end process;
|
||||
|
||||
---------------------------------------------------------------------------------------------
|
||||
char_reg_ctrl: process (vga_clk)
|
||||
begin
|
||||
if rising_edge(vga_clk) and ce = '1' then
|
||||
if char_x_cnt = 2 then -- +2 delay for ASCII-RAM access and CHAR-ROM access
|
||||
for i in 0 to CHAR_ROM_SIZE_X-1 loop
|
||||
for j in 0 to CHARACTER_SCALE-1 loop
|
||||
char_reg(i*CHARACTER_SCALE + j) <= char_rom_data(i) xor cursor_rom_data(i);
|
||||
end loop;
|
||||
end loop;
|
||||
else
|
||||
char_reg <= char_reg(char_reg'left-1 downto 0) & '0';
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
---------------------------------------------------------------------------------------------
|
||||
cg_ctrl: process (rst, vga_clk)
|
||||
variable enable_x : std_logic;
|
||||
variable enable_y : std_logic;
|
||||
variable char_en : std_logic;
|
||||
variable char_en2 : std_logic;
|
||||
begin
|
||||
|
||||
if (rst = '1') then
|
||||
enable_x := '0';
|
||||
enable_y := '0';
|
||||
line_offset <= 0;
|
||||
cell_x_cnt <= 0;
|
||||
cell_y_cnt <= 0;
|
||||
char_x_cnt <= 0;
|
||||
char_y_cnt <= 0;
|
||||
char_en := '0';
|
||||
elsif rising_edge(vga_clk) and ce = '1' then
|
||||
char_draw_en <= char_en2 and char_reg(char_reg'left);
|
||||
char_en2 := char_en;
|
||||
char_en := '0';
|
||||
if pos_y = SCREEN_OFFSET_Y then
|
||||
enable_y := '1';
|
||||
cell_y_cnt <= 0;
|
||||
char_x_cnt <= 0;
|
||||
line_offset <= scroll_offset;
|
||||
end if;
|
||||
if pos_x = SCREEN_OFFSET_X and enable_y = '1' then
|
||||
enable_x := '1';
|
||||
cell_x_cnt <= 0;
|
||||
char_x_cnt <= 0;
|
||||
elsif enable_x = '1' and enable_y = '1' then
|
||||
if char_x_cnt < CELL_SIZE_X-1 then
|
||||
char_x_cnt <= char_x_cnt + 1;
|
||||
else
|
||||
char_x_cnt <= 0;
|
||||
if cell_x_cnt < MAX_CHAR_PER_LINE-1 then
|
||||
cell_x_cnt <= cell_x_cnt + 1;
|
||||
else
|
||||
enable_x := '0';
|
||||
if char_y_cnt < CELL_SIZE_Y-1 then
|
||||
char_y_cnt <= char_y_cnt + 1;
|
||||
else
|
||||
char_y_cnt <= 0;
|
||||
if cell_y_cnt < MAX_LINE_PER_FRAME-1 then
|
||||
cell_y_cnt <= cell_y_cnt + 1;
|
||||
else
|
||||
enable_y := '0';
|
||||
end if;
|
||||
if line_offset < MAX_LINE_PER_FRAME-1 then
|
||||
line_offset <= line_offset + 1;
|
||||
else
|
||||
line_offset <= 0;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
if (char_x_cnt < CHAR_SIZE_X) and (char_y_cnt < CHAR_SIZE_Y) then
|
||||
char_en := '1';
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
---------------------------------------------------------------------------------------------
|
||||
end Behavioral;
|
||||
Reference in New Issue
Block a user