- refactored

git-svn-id: http://moon:8086/svn/vhdl/trunk@1587 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2021-03-29 17:52:26 +00:00
parent a4b3c6cbb5
commit d32d1d090b
8 changed files with 10 additions and 3 deletions
@@ -0,0 +1,29 @@
vhdl work "../../../../lib/rams/sim/src/dpram_1w1r2c_ro.vhd"
vhdl work "../../../../lib/misc/utils_pkg.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_c64.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
vhdl work "../../../../lib/rams/sim/src/dpram_1w1r2c_ra.vhd"
vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
vhdl work "../../../../lib/FIFO/src/fifo_async_ctrl.vhd"
vhdl work "../../../../lib/FIFO/src/fifo_async.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/cpu.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/alu.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/chipram.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/chipreg.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/dpath_ctrl.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/int_ctrl.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/pc.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/reg_dual.vhd"
vhdl work "../../../../lib/CPUs/JCpu/src/core/stack_ctrl.vhd"
vhdl work "../../../../lib/clock/xilinx/src/clockgen.vhd"
vhdl work "../../src/main_xrom.vhdl"
vhdl work "../../src/main_irom.vhdl"
vhdl work "../../src/cpu_embedded.vhd"
vhdl work "../../src/vga_ctrl_top.vhd"
vhdl work "../../src/vga_ctrl_sys.vhd"