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- added gigabit--mode

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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@860 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-04-06 18:30:31 +00:00
parent d7b6040c38
commit d1e30cfa5c
7 changed files with 151 additions and 102 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/emac/sim/tb_emac_top_jb.fdo
+2 -1
View File
@@ -18,6 +18,7 @@ vcom -explicit -93 "../src/emac_types.vhd"
vcom -explicit -93 "../src/emac_rx.vhd"
vcom -explicit -93 "../src/emac_tx.vhd"
vcom -explicit -93 "../src/emac_top_jb.vhd"
vcom -explicit -93 "../src/pkt_gen.vhd"
vcom -explicit -93 "../src/tb_emac_top_jb.vhd"
vsim -t 1ps -lib work tb_emac_top_jb
view wave
@@ -25,4 +26,4 @@ do {tb_emac_top_jb.wdo}
view structure
view signals
run 250 us
run 50000 us
lib/emac/sim/tb_emac_top_jb.wdo
+26 -54
View File
@@ -42,7 +42,7 @@ add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/c
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/rst
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/dout_vld
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/dout
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ctrl_in
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ctrl_in
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ctrl_out
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx_clk
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx_dv
@@ -50,12 +50,6 @@ add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/m
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_rx
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_crs
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_col
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_we
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_re
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_empty
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mii_fifo_full
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/cmd_fifo_we
@@ -67,47 +61,30 @@ add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/c
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ram_limit
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ram_full
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_base
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_size
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ptr
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ptr_set
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_ptr_adv
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_cnt_set
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_cnt_adv
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_rdy
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_en_a
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_we_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_addr_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_din_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_dout_a
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_en_b
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_we_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_addr_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/ram_din_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_dout
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_dout_be
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_dout_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_32bit_rst
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_rst
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_dout_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/byte_count_en
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/byte_count
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/byte_count_reg
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/word_count
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/word_count_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_full
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_empty
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_we
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_re
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/size_fifo_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_din
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_din_vld
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_be
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_dout_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo32_rst
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_rst
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo8_dout_en
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/host_s
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/xfer_s
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/stream_s
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_rst
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_bsy
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/preamble_ok
@@ -117,9 +94,7 @@ add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/m
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_rst
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_num_ok
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_addr
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_dout_vld
add wave -noupdate -format Literal -radix unsigned /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/mac_chk_cnt
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_rx/sipo_8bit_dout
add wave -noupdate -divider TX
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/clk
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/rst
@@ -167,30 +142,27 @@ add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/r
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_we_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_addr_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_din_a
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_dout_a
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_en_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_addr_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_din_b
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ram_dout_b
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ifg_cnt
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/ifg_idle
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_be
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_rdy
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_vld
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_be
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_rdy
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_din_vld
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso32_dout_en
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout_vld
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout_en
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_dout
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_we
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_re
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_empty
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mii_fifo_full
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/stream_s
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_din_rdy
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/piso8_dout
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/host_s
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/xfer_s
add wave -noupdate -format Logic /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_free_req
add wave -noupdate -format Literal /tb_emac_top_jb/inst_emac_top_jb/inst_emac_tx/mem_free_ack
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {18401055846 ps} 0} {{Cursor 2} {49999375873 ps} 0}
WaveRestoreCursors {{Cursor 1} {19367378049 ps} 0} {{Cursor 2} {49999375873 ps} 0}
configure wave -namecolwidth 150
configure wave -valuecolwidth 100
configure wave -justifyvalue left
@@ -204,4 +176,4 @@ configure wave -gridperiod 100
configure wave -griddelta 40
configure wave -timeline 1
update
WaveRestoreZoom {3250153138 ps} {28560670888 ps}
WaveRestoreZoom {0 ps} {52500 us}
lib/emac/src/emac_rx.vhd
+48 -27
View File
@@ -67,6 +67,8 @@ ARCHITECTURE behavior OF emac_rx IS
signal ram_en_b : std_logic;
signal ram_addr_b : word_ptr_t;
signal sipo32_din : unsigned(7 downto 0);
signal sipo32_din_vld : std_logic;
signal sipo32_dout : unsigned(31 downto 0);
signal sipo32_dout_be : unsigned(3 downto 0);
signal sipo32_dout_vld : std_logic;
@@ -78,7 +80,6 @@ ARCHITECTURE behavior OF emac_rx IS
signal sipo8_rst : std_logic;
signal sipo8_dout_vld : std_logic;
signal sipo8_dout_en : std_logic;
signal sipo8_en : std_logic;
signal byte_count_en : std_logic;
signal byte_count : word_ptr_t;
@@ -98,8 +99,12 @@ ARCHITECTURE behavior OF emac_rx IS
signal mac_chk_num_OK : natural range 0 to 6;
signal mac_chk_num_BC : natural range 0 to 6;
signal mac_chk_cnt : natural range 0 to 5;
signal mac_addr : mac_addr_t;
signal mac_chk_addr : mac_addr_t;
signal rx_en : std_logic;
signal Gbps_en : std_logic;
type host_state_t is (host_init, host_flush, host_idle);
signal host_s, host_sn : host_state_t;
@@ -108,13 +113,13 @@ ARCHITECTURE behavior OF emac_rx IS
alias cmd_mac_ok_in is cmd_fifo_din(cmd_fifo_din'left);
alias cmd_bcast_in is cmd_fifo_din(cmd_fifo_din'left-1);
alias cmd_pkt_lost_in is cmd_fifo_din(cmd_fifo_din'left-2);
alias cmd_pkt_valid_in is cmd_fifo_din(cmd_fifo_din'left-2);
alias cmd_nbytes_in is cmd_fifo_din(word_ptr_t'length-1 downto 0);
alias cmd_base_in is cmd_fifo_din(2*word_ptr_t'length-1 downto word_ptr_t'length);
alias cmd_mac_ok_out is cmd_fifo_dout(cmd_fifo_dout'left);
alias cmd_bcast_out is cmd_fifo_dout(cmd_fifo_dout'left-1);
alias cmd_pkt_lost_out is cmd_fifo_dout(cmd_fifo_dout'left-2);
alias cmd_pkt_valid_out is cmd_fifo_dout(cmd_fifo_dout'left-2);
alias cmd_nbytes_out is cmd_fifo_dout(word_ptr_t'length-1 downto 0);
alias cmd_base_out is cmd_fifo_dout(2*word_ptr_t'length-1 downto word_ptr_t'length);
@@ -122,11 +127,11 @@ begin
ctrl_out.rx_size <= resize(cmd_nbytes_out, 16);
ctrl_out.pkt_avail <= not cmd_fifo_empty;
ctrl_out.rx_er <= mii_rx_er;
ctrl_out.reset_busy <= reset_en;
ctrl_out.pkt_valid <= cmd_pkt_valid_out;
ctrl_out.pkt_bcast <= cmd_bcast_out;
ctrl_out.pkt_mac_match <= cmd_mac_ok_out;
ctrl_out.pkt_lost <= cmd_pkt_lost_out;
ctrl_out.rx_er <= mii_rx_er;
ctrl_out.reset_busy <= reset_en;
dout <= ram_dout_b;
@@ -138,15 +143,15 @@ begin
ram_addr_a <= xfer_ptr;
ram_we_a <= xfer_en and sipo32_dout_vld;
xfer_vld <= not xfer_ram_full and (mac_chk_OK or mac_chk_BC or ctrl_in.promiscious);
xfer_vld <= not xfer_ram_full and (mac_chk_OK or mac_chk_BC or xfer_promiscious);
cmd_fifo_we <= commit_en;
cmd_fifo_re <= ctrl_in.pkt_free_en;
cmd_pkt_valid_in <= '1';
cmd_mac_ok_in <= mac_chk_OK;
cmd_bcast_in <= mac_chk_BC;
cmd_nbytes_in <= byte_count_reg;
cmd_base_in <= xfer_base;
cmd_pkt_lost_in <= xfer_ram_full;
reset_en <= reset_pipe(reset_pipe'left);
@@ -188,6 +193,8 @@ host2xfer_sync_register:
begin
if rising_edge(mii_rx_clk) then
xfer_promiscious <= ctrl_in.promiscious;
Gbps_en <= ctrl_in.Gbps_en;
mac_addr <= ctrl_in.mac_addr;
end if;
end process;
@@ -253,7 +260,7 @@ byte_counter:
if rising_edge(mii_rx_clk) then
if sipo8_rst = '1' then
byte_count <= (others => '0');
elsif byte_count_en = '1' and sipo8_dout_vld = '1' then
elsif byte_count_en = '1' and sipo32_din_vld = '1' then
byte_count <= byte_count + 1;
end if;
end if;
@@ -277,13 +284,13 @@ preamble_sync_logic:
preamble_rdy <= '0';
preamble_bsy <= '0';
preamble_OK <= '0';
elsif sipo8_dout_vld = '1' then
elsif sipo32_din_vld = '1' then
if preamble_bsy = '1' then
if sipo8_dout = X"D5" then
if sipo32_din = X"D5" then
preamble_OK <= '1';
end if;
end if;
if sipo8_dout /= X"55" then
if sipo32_din /= X"55" then
preamble_bsy <= '0';
preamble_rdy <= preamble_bsy;
else
@@ -304,7 +311,7 @@ mac_check_logic:
mac_chk_cnt <= 0;
mac_chk_num_OK <= 0;
mac_chk_num_BC <= 0;
mac_chk_addr <= ctrl_in.mac_addr;
mac_chk_addr <= mac_addr;
elsif mac_chk_rdy = '1' then
if mac_chk_num_OK = 6 then
mac_chk_OK <= '1';
@@ -312,11 +319,11 @@ mac_check_logic:
if mac_chk_num_BC = 6 then
mac_chk_BC <= '1';
end if;
elsif sipo8_dout_vld = '1' then
if sipo8_dout = mac_chk_addr(mac_chk_cnt) then
elsif sipo32_din_vld = '1' then
if sipo32_din = mac_chk_addr(mac_chk_cnt) then
mac_chk_num_OK <= mac_chk_num_OK + 1;
end if;
if sipo8_dout = X"FF" then
if sipo32_din = X"FF" then
mac_chk_num_BC <= mac_chk_num_BC + 1;
end if;
if mac_chk_cnt /= 5 then
@@ -342,7 +349,7 @@ xfer_state_next:
end process;
xfer_state:
process(xfer_s, reset_en, sipo8_dout_en, sipo8_dout, sipo32_dout_en, sipo32_dout_vld, preamble_rdy, preamble_OK, xfer_ram_full, xfer_vld)
process(xfer_s, reset_en, rx_en, sipo32_dout_en, sipo32_dout_vld, preamble_rdy, preamble_OK, xfer_ram_full, xfer_vld)
begin
commit_en <= '0';
@@ -355,14 +362,14 @@ xfer_state:
preamble_rst <= reset_en;
mac_chk_rst <= reset_en;
sipo32_en <= sipo8_dout_en;
sipo32_en <= rx_en;
xfer_sn <= xfer_s;
case xfer_s is
when xfer_init =>
if sipo8_dout_en = '0' then
if rx_en = '0' then
xfer_sn <= xfer_reset;
end if;
@@ -387,22 +394,22 @@ xfer_state:
when xfer_setup =>
xfer_set <= '1';
xfer_en <= sipo32_dout_en;
byte_count_en <= sipo8_dout_en;
byte_count_en <= rx_en;
xfer_sn <= xfer_active;
when xfer_active =>
xfer_en <= sipo32_dout_en;
byte_count_en <= sipo8_dout_en;
byte_count_en <= rx_en;
if xfer_ram_full = '1' then
xfer_sn <= xfer_finish;
elsif sipo8_dout_en = '0' then
elsif rx_en = '0' then
xfer_sn <= xfer_stop;
sipo8_rst <= '1';
end if;
when xfer_stop =>
xfer_en <= sipo32_dout_en;
byte_count_en <= sipo8_dout_en;
byte_count_en <= rx_en;
if sipo32_dout_en = '0' then
xfer_sn <= xfer_finish;
end if;
@@ -471,9 +478,9 @@ inst_sipo32 : entity work.sipo
(
rst => sipo32_rst,
clk => mii_rx_clk,
din_vld => sipo8_dout_vld,
din_vld => sipo32_din_vld,
din_en => sipo32_en,
din => sipo8_dout,
din => sipo32_din,
dout_be => sipo32_dout_be,
dout_vld => sipo32_dout_vld,
dout => sipo32_dout,
@@ -481,6 +488,21 @@ inst_sipo32 : entity work.sipo
);
mii_input_register:
process(mii_rx_clk)
begin
if rising_edge(mii_rx_clk) then
if Gbps_en = '1' then
sipo32_din <= mii_rx;
sipo32_din_vld <= mii_rx_dv;
rx_en <= mii_rx_dv;
else
sipo32_din <= sipo8_dout;
sipo32_din_vld <= sipo8_dout_vld;
rx_en <= sipo8_dout_en;
end if;
end if;
end process;
inst_sipo_8bit : entity work.sipo
GENERIC MAP
@@ -494,7 +516,7 @@ inst_sipo_8bit : entity work.sipo
rst => sipo8_rst,
clk => mii_rx_clk,
din_vld => mii_rx_dv,
din_en => sipo8_en,
din_en => mii_rx_dv,
din => mii_rx(3 downto 0),
dout_be => open,
dout_vld => sipo8_dout_vld,
@@ -502,6 +524,5 @@ inst_sipo_8bit : entity work.sipo
dout_en => sipo8_dout_en
);
sipo8_en <= mii_rx_dv;
end behavior;
lib/emac/src/emac_top_jb.vhd
+12 -7
View File
@@ -90,17 +90,21 @@ registers_write:
tx_ctrl_in.tx_size <= (others => '0');
rx_ctrl_in.mac_addr <= (X"03", X"02", X"01", X"00", X"07", X"06");
rx_ctrl_in.promiscious <= '1';
tx_ctrl_in.Gbps_en <= '0';
rx_ctrl_in.Gbps_en <= '0';
elsif (STB_I and CYC_I and WE_I) = '1' then
case ADDR_I(5 downto 2) is
when "0000" =>
tx_ctrl_in.tx_er <= DAT_I(31);
tx_ctrl_in.reset <= DAT_I(27);
tx_ctrl_in.Gbps_en <= DAT_I(26);
tx_ctrl_in.pkt_alloc_en <= DAT_I(25);
tx_ctrl_in.pkt_commit_en <= DAT_I(24);
rx_ctrl_in.reset <= DAT_I(23);
rx_ctrl_in.pkt_free_en <= DAT_I(17);
rx_ctrl_in.pkt_req_en <= DAT_I(16);
rx_ctrl_in.Gbps_en <= DAT_I(22);
rx_ctrl_in.pkt_req_en <= DAT_I(17);
rx_ctrl_in.pkt_free_en <= DAT_I(16);
tx_int_en <= DAT_I(5);
rx_int_en <= DAT_I(4);
rx_ctrl_in.promiscious <= DAT_I(3);
@@ -142,17 +146,18 @@ registers_read:
ACK_O <= ready;
DAT_O <= (others => '0');
DAT_O(31) <= tx_ctrl_in.tx_er;
DAT_O(30) <= mii_rx_er; -- remove that
DAT_O(29) <= mii_col; -- remove that
DAT_O(28) <= mii_crs; -- remove that
DAT_O(30) <= '0';
DAT_O(29) <= '0';
DAT_O(28) <= tx_ctrl_out.pkt_done;
DAT_O(27) <= tx_ctrl_out.reset_busy;
DAT_O(26) <= tx_ctrl_out.pkt_done;
DAT_O(26) <= tx_ctrl_in.Gbps_en;
DAT_O(25) <= tx_ctrl_out.pkt_alloc_req;
DAT_O(24) <= tx_ctrl_out.pkt_armed;
DAT_O(23) <= rx_ctrl_out.reset_busy;
DAT_O(22) <= rx_ctrl_in.Gbps_en;
DAT_O(19) <= rx_ctrl_out.pkt_bcast;
DAT_O(18) <= rx_ctrl_out.pkt_mac_match;
DAT_O(17) <= rx_ctrl_out.pkt_lost;
DAT_O(17) <= rx_ctrl_out.pkt_valid;
DAT_O(16) <= rx_ctrl_out.pkt_avail;
DAT_O(5) <= tx_int_en;
DAT_O(4) <= rx_int_en;
lib/emac/src/emac_tx.vhd
+24 -4
View File
@@ -99,7 +99,8 @@ ARCHITECTURE behavior OF emac_tx IS
signal piso8_dout : unsigned(3 downto 0);
signal reset_pipe : unsigned(31 downto 0);
signal Gbps_en : std_logic;
subtype ifg_cnt_t is natural range 0 to 23; -- 10/100 mbps
-- subtype ifg_cnt_t is natural range 0 to 11; -- 1000 mbps
@@ -355,6 +356,14 @@ mem_free_host:
end if;
end process;
host2xfer_sync_register:
process(mii_tx_clk)
begin
if rising_edge(mii_tx_clk) then
Gbps_en <= ctrl_in.Gbps_en;
end if;
end process;
------------------------------------------------------------------
-- Fill stuff
------------------------------------------------------------------
@@ -604,7 +613,7 @@ inst_piso32 : entity work.piso
);
piso32_dout_en <= piso8_din_rdy and ifg_idle;
piso32_dout_en <= ifg_idle when Gbps_en = '1' else (piso8_din_rdy and ifg_idle);
inst_piso8 : entity work.piso
GENERIC MAP
@@ -627,7 +636,18 @@ inst_piso8 : entity work.piso
);
mii_tx_en <= piso8_dout_vld;
mii_tx <= "0000" & piso8_dout;
mii_output_register:
process(mii_tx_clk)
begin
if rising_edge(mii_tx_clk) then
if Gbps_en = '1' then
mii_tx_en <= piso32_dout_vld;
mii_tx <= piso32_dout;
else
mii_tx_en <= piso8_dout_vld;
mii_tx <= "0000" & piso8_dout;
end if;
end if;
end process;
end behavior;
lib/emac/src/emac_types.vhd
+4 -2
View File
@@ -16,11 +16,12 @@ package emac_types is
-- Types
type tx_ctrl_in_t is record
Gbps_en : std_logic;
reset : std_logic;
tx_er : std_logic;
tx_size : unsigned(15 downto 0);
pkt_commit_en : std_logic;
pkt_alloc_en : std_logic;
reset : std_logic;
end record;
type tx_ctrl_out_t is record
@@ -32,6 +33,7 @@ package emac_types is
end record;
type rx_ctrl_in_t is record
Gbps_en : std_logic;
reset : std_logic;
pkt_read_en : std_logic;
pkt_req_en : std_logic;
@@ -43,7 +45,7 @@ package emac_types is
type rx_ctrl_out_t is record
rx_er : std_logic;
pkt_avail : std_logic;
pkt_lost : std_logic;
pkt_valid : std_logic;
pkt_bcast : std_logic;
pkt_mac_match : std_logic;
rx_size : unsigned(15 downto 0);
lib/emac/src/tb_emac_top_jb.vhd
+35 -7
View File
@@ -32,7 +32,7 @@ END tb_emac_top_jb;
ARCHITECTURE behavior OF tb_emac_top_jb IS
constant CLK_PERIOD : time := 10 ns;
constant MII_CLK_PERIOD : time := 40.7 ns;
constant MII_CLK_PERIOD : time := 7.7 ns;
signal CLK : std_logic := '1';
signal RST : std_logic := '1';
@@ -206,7 +206,14 @@ STIMULUS: process
-- set alloc request
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0200_0000";
WE_I <= '0';
STB_I <= '1';
ADDR_I <= X"0000_0000";
wait until rising_edge(CLK) and SRDY_O = '1';
STB_I <= '0';
wait until rising_edge(CLK) and ACK_O = '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0200_0000" or (not X"0103_0000" and DAT_O_reg);
STB_I <= '1';
WE_I <= '1';
ADDR_I <= X"0000_0000";
@@ -244,7 +251,14 @@ STIMULUS: process
-- set free request
CYC_I <= '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0100_0000";
WE_I <= '0';
STB_I <= '1';
ADDR_I <= X"0000_0000";
wait until rising_edge(CLK) and SRDY_O = '1';
STB_I <= '0';
wait until rising_edge(CLK) and ACK_O = '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0100_0000" or (not X"0203_0000" and DAT_O_reg);
STB_I <= '1';
WE_I <= '1';
ADDR_I <= X"0000_0000";
@@ -315,7 +329,7 @@ STIMULUS: process
STB_I <= '0';
wait until rising_edge(CLK) and ACK_O = '1';
wait until rising_edge(CLK);
if DAT_O_reg(16) = '1' then
if DAT_O_reg(17) = '1' and DAT_O_reg(16) = '1' then
exit check_data_avail;
end if;
end loop;
@@ -335,7 +349,14 @@ STIMULUS: process
-- set packet request
CYC_I <= '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0001_0000";
WE_I <= '0';
STB_I <= '1';
ADDR_I <= X"0000_0000";
wait until rising_edge(CLK) and SRDY_O = '1';
STB_I <= '0';
wait until rising_edge(CLK) and ACK_O = '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0002_0000" or (not X"0301_0000" and DAT_O_reg);
STB_I <= '1';
WE_I <= '1';
ADDR_I <= X"0000_0000";
@@ -383,7 +404,14 @@ STIMULUS: process
-- set free request
CYC_I <= '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0002_0000";
WE_I <= '0';
STB_I <= '1';
ADDR_I <= X"0000_0000";
wait until rising_edge(CLK) and SRDY_O = '1';
STB_I <= '0';
wait until rising_edge(CLK) and ACK_O = '1';
wait until rising_edge(CLK) and SRDY_O = '1';
DAT_I <= X"0001_0000" or (not X"0302_0000" and DAT_O_reg);
STB_I <= '1';
WE_I <= '1';
ADDR_I <= X"0000_0000";
@@ -529,7 +557,7 @@ STIMULUS: process
pktgen_rst <= '0';
pkt_count <= 0;
for i in 1 to 500 loop
wait for 10 us;
wait for 1 us;
emac_read (0);
emac_free;
pkt_count <= pkt_count + 1;