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tb_mips_sys_sim compile clean

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jens
2022-06-30 23:27:06 +02:00
parent 288ed8d40c
commit cf0e2229f5
1 changed files with 3 additions and 4 deletions
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projects/mips_sys/src/mips_sys_sim.vhd
+3 -4
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@@ -163,7 +163,6 @@ ARCHITECTURE behavior OF mips_sys IS
signal vga_clk : std_logic; signal vga_clk : std_logic;
signal vga_rst : std_logic; signal vga_rst : std_logic;
signal vga_ce : std_logic;
signal rst_in : std_logic; signal rst_in : std_logic;
signal int_timer : std_logic; signal int_timer : std_logic;
signal int_uart0 : std_logic; signal int_uart0 : std_logic;
@@ -369,8 +368,8 @@ BEGIN
SEL_I_sdram <= "0000" & SEL_O; SEL_I_sdram <= "0000" & SEL_O;
sys_flash_ac97_rstn <= ac97_rstn and flash_rstn; sys_flash_ac97_rstn <= ac97_rstn and flash_rstn;
vga_ce <= not vga_rst;
sys_phy_gtx_clk <= gmii_clk; sys_phy_gtx_clk <= gmii_clk;
sys_flash_ssram_out: sys_flash_ssram_out:
process(CLK_O) process(CLK_O)
begin begin
@@ -935,8 +934,8 @@ inst_vga_frontend : entity work.vga_frontend_jb64
SDAT_O => SDAT_O_vga, SDAT_O => SDAT_O_vga,
-- VGA signals -- VGA signals
vga_clk_in => vga_clk, vga_clk => vga_clk,
vga_clk_ce => vga_ce, vga_rst => vga_rst,
vga_red => sys_vga_red, vga_red => sys_vga_red,
vga_green => sys_vga_green, vga_green => sys_vga_green,
vga_blue => sys_vga_blue, vga_blue => sys_vga_blue,