jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- added asynchronous BUS FIFOs

Browse Source 
- added cpu_clk
Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@726 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-02-07 19:12:19 +00:00
parent e0e8566bec
commit c42c0ba5b8
1 changed files with 4 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/src/tb_mips_top.vhd
+4
View File
@@ -37,6 +37,7 @@ END tb_mips_top;
ARCHITECTURE behavior OF tb_mips_top IS ARCHITECTURE behavior OF tb_mips_top IS
constant SYS_FREQ : natural := 100E6;
constant CLK_PERIOD : time := 10 ns; constant CLK_PERIOD : time := 10 ns;
constant SRAM_ADDR_WIDTH : integer := 17; -- bits constant SRAM_ADDR_WIDTH : integer := 17; -- bits
constant FLASH_ADDR_WIDTH : integer := 17; -- bits constant FLASH_ADDR_WIDTH : integer := 17; -- bits
@@ -207,6 +208,7 @@ uut: entity work.mips_top
( (
debug => debug, debug => debug,
eb => eb, eb => eb,
cpu_clk => clk,
RST_I => rst, RST_I => rst,
CLK_I => clk, CLK_I => clk,
ACK_I => ACK_I, ACK_I => ACK_I,
@@ -265,6 +267,7 @@ inst_gpio : entity work.gpio_wb
inst_flash_port : entity work.async_port_wb inst_flash_port : entity work.async_port_wb
GENERIC MAP GENERIC MAP
( (
f_sysclk_hz => SYS_FREQ,
addr_width => FLASH_ADDR_WIDTH, addr_width => FLASH_ADDR_WIDTH,
data_width => 32, data_width => 32,
byte_sel_width => 4, byte_sel_width => 4,
@@ -297,6 +300,7 @@ inst_flash_port : entity work.async_port_wb
inst_sram_port : entity work.async_port_wb inst_sram_port : entity work.async_port_wb
GENERIC MAP GENERIC MAP
( (
f_sysclk_hz => SYS_FREQ,
addr_width => SRAM_ADDR_WIDTH, addr_width => SRAM_ADDR_WIDTH,
data_width => 32, data_width => 32,
byte_sel_width => 4, byte_sel_width => 4,