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Improved templ

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This commit is contained in:
jens
2022-09-10 10:35:01 +02:00
parent 103e04d35f
commit c2ce21f67c
1 changed files with 12 additions and 12 deletions
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lib/CPUs/MIPS/ghdl/tb_mips_top.wopt.templ
+12 -12
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@@ -59,8 +59,8 @@ $ version 1.1
/tb_mips_top/rx
/tb_mips_top/tx
/tb_mips_top/mem_area
#/tb_mips_top/sram_data
#/tb_mips_top/flash_data
/tb_mips_top/sram_data
/tb_mips_top/flash_data
/tb_mips_top/uut/debug
/tb_mips_top/uut/eb
/tb_mips_top/uut/nmi
@@ -458,7 +458,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/clk_a
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/clk_b
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/we_a
@@ -467,7 +467,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/addr_b
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/din_a
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/dout_b
# /tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_icache/inst_data_ram/addr_b_r
/tb_mips_top/uut/inst_biu/inst_dcache/rst_i
/tb_mips_top/uut/inst_biu/inst_dcache/clk_i
@@ -555,7 +555,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_dcache/inst_tag_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_dcache/inst_tag_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_dcache/inst_tag_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_dcache/inst_tag_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/inst_tag_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_a
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/re_a
@@ -570,7 +570,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_a
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/re_a
@@ -585,7 +585,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_a
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/re_a
@@ -600,7 +600,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_a
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/clk_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/re_a
@@ -615,7 +615,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/dout_b
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_a_r
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/addr_b_r
# /tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_dcache/gen_data_ram/inst_data_ram/memory_content
/tb_mips_top/uut/inst_biu/inst_bin_fifo/rst
/tb_mips_top/uut/inst_biu/inst_bin_fifo/clk_w
/tb_mips_top/uut/inst_biu/inst_bin_fifo/clk_r
@@ -715,7 +715,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/addr_b
/tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/din_a
/tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/dout_b
# /tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_bin_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/addr_b_r
/tb_mips_top/uut/inst_biu/inst_bout_fifo/rst
/tb_mips_top/uut/inst_biu/inst_bout_fifo/clk_w
@@ -827,7 +827,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/addr_b
/tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/din_a
/tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/dout_b
# /tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_bout_fifo/inst_fifo_async_stage/inst_dpram_1w1r2c/addr_b_r
/tb_mips_top/uut/inst_biu/inst_write_fifo/rst
/tb_mips_top/uut/inst_biu/inst_write_fifo/clk
@@ -895,7 +895,7 @@ $ version 1.1
/tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/addr_b
/tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/din_a
/tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/dout_b
# /tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/memory_content
/tb_mips_top/uut/inst_biu/inst_write_fifo/inst_fifo_sync_stage/inst_dpram_1w1r2c/addr_b_r
/tb_mips_top/inst_rom/clk_i
/tb_mips_top/inst_rom/rst_i