[Xilinx/dpram_2w2r2c_ra]

- re_a, re_b don't care

git-svn-id: http://moon:8086/svn/vhdl/trunk@1114 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-05-17 18:14:42 +00:00
parent bafe1745c5
commit bd3aa8c06e
+4 -4
View File
@@ -70,9 +70,9 @@ if clk_a'event and clk_a = '1' then
if we_a = '1' then if we_a = '1' then
RAM(to_integer(addr_a)) := din_a; RAM(to_integer(addr_a)) := din_a;
end if; end if;
if re_a = '1' then -- if re_a = '1' then
addr_a_r <= addr_a; addr_a_r <= addr_a;
end if; -- end if;
end if; end if;
end process; end process;
@@ -83,9 +83,9 @@ if clk_b'event and clk_b = '1' then
if we_b = '1' then if we_b = '1' then
RAM(to_integer(addr_b)) := din_b; RAM(to_integer(addr_b)) := din_b;
end if; end if;
if re_b = '1' then -- if re_b = '1' then
addr_b_r <= addr_b; addr_b_r <= addr_b;
end if; -- end if;
end if; end if;
end process; end process;