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- fixed paths

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1563 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 18:28:34 +00:00
parent dda7811902
commit b99fc27ccc
2 changed files with 5 additions and 15 deletions
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lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
+3 -3
View File
@@ -1,6 +1,6 @@
# ----------------------------------------------------------- # -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk include $(VHDL_HOME)/make/defs.mk
include vga_backend.inc include $(LIB_PATH)/VGA_ctrl/ghdl/vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
@@ -8,10 +8,10 @@ include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
PKG_NAME := VGA_FRONTEND_JB64 PKG_NAME := VGA_FRONTEND_JB64
# ----------------------------------------------------------- # -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(VGA_BACKEND_SRCS) $(PKG_NAME)_SRCS += $(VGA_BACKEND_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS) $(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS) $(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += ../src/vga_frontend_jb64.vhd $(PKG_NAME)_SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_frontend_jb64.vhd
# ----------------------------------------------------------- # -----------------------------------------------------------
projects/mips_sys/ghdl/tb_mips_sys.make
+2 -12
View File
@@ -5,6 +5,7 @@ include $(LIB_PATH)/CPUs/MIPS/ghdl/mips_core.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/emac/ghdl/emac_jbus.inc include $(LIB_PATH)/emac/ghdl/emac_jbus.inc
include $(LIB_PATH)/VGA_ctrl/ghdl/vga_frontend_jb64.inc
# Configs # Configs
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -15,11 +16,6 @@ SRCS += ../src/sdram_config_sim.vhd
# Clock Generator # Clock Generator
SRCS += ../src/clockgen.vhd SRCS += ../src/clockgen.vhd
# UART
SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
SRCS += $(LIB_PATH)/uart/src/uart_wb.vhd
# MIPS # MIPS
SRCS += $(MIPS_CORE_SRCS) SRCS += $(MIPS_CORE_SRCS)
@@ -32,13 +28,7 @@ SRCS += $(LIB_PATH)/JBUS/memory/src/rom_wb.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
# VGA # VGA
SRCS += $(LIB_PATH)/VGA_ctrl/src/fonts/char_rom_c64.vhd SRCS += $(VGA_FRONTEND_JB64_SRCS)
SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_types.vhd
SRCS += $(LIB_PATH)/VGA_ctrl/src/char_gen.vhd
SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_sync.vhd
SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_timing.vhd
SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_backend.vhd
SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_frontend_jb64.vhd
# UART # UART
SRCS += $(LIB_PATH)/uart/src/uart_types.vhd SRCS += $(LIB_PATH)/uart/src/uart_types.vhd