From b99fc27ccc479b032e3033fa8ac8c606b11e62f4 Mon Sep 17 00:00:00 2001
From: Jens Ahrensfeld <jens@jayfield.org>
Date: Sun, 28 Mar 2021 18:28:34 +0000
Subject: [PATCH] - fixed paths

git-svn-id: http://moon:8086/svn/vhdl/trunk@1563 cc03376c-175c-47c8-b038-4cd826a8556b
---
 lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc |  6 +++---
 projects/mips_sys/ghdl/tb_mips_sys.make | 14 ++------------
 2 files changed, 5 insertions(+), 15 deletions(-)

diff --git a/lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc b/lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
index c2f4256..9f0e538 100644
--- a/lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
+++ b/lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
@@ -1,6 +1,6 @@
 # -----------------------------------------------------------
 include $(VHDL_HOME)/make/defs.mk
-include vga_backend.inc
+include $(LIB_PATH)/VGA_ctrl/ghdl/vga_backend.inc
 include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
 include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
 
@@ -8,10 +8,10 @@ include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
 PKG_NAME := VGA_FRONTEND_JB64
 
 # -----------------------------------------------------------
-$(PKG_NAME)_SRCS := $(VGA_BACKEND_SRCS)
+$(PKG_NAME)_SRCS += $(VGA_BACKEND_SRCS)
 $(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS)
 $(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
-$(PKG_NAME)_SRCS += ../src/vga_frontend_jb64.vhd
+$(PKG_NAME)_SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_frontend_jb64.vhd
 
 # -----------------------------------------------------------
 
diff --git a/projects/mips_sys/ghdl/tb_mips_sys.make b/projects/mips_sys/ghdl/tb_mips_sys.make
index 87617db..0de6c0e 100644
--- a/projects/mips_sys/ghdl/tb_mips_sys.make
+++ b/projects/mips_sys/ghdl/tb_mips_sys.make
@@ -5,6 +5,7 @@ include $(LIB_PATH)/CPUs/MIPS/ghdl/mips_core.inc
 include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
 include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
 include $(LIB_PATH)/emac/ghdl/emac_jbus.inc
+include $(LIB_PATH)/VGA_ctrl/ghdl/vga_frontend_jb64.inc
 
 # Configs
 SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -15,11 +16,6 @@ SRCS += ../src/sdram_config_sim.vhd
 # Clock Generator
 SRCS += ../src/clockgen.vhd
 
-# UART
-SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
-SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
-SRCS += $(LIB_PATH)/uart/src/uart_wb.vhd
-
 # MIPS
 SRCS += $(MIPS_CORE_SRCS)
 
@@ -32,13 +28,7 @@ SRCS += $(LIB_PATH)/JBUS/memory/src/rom_wb.vhd
 SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
 
 # VGA
-SRCS += $(LIB_PATH)/VGA_ctrl/src/fonts/char_rom_c64.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_types.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/char_gen.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_sync.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_timing.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_backend.vhd
-SRCS += $(LIB_PATH)/VGA_ctrl/src/vga_frontend_jb64.vhd
+SRCS += $(VGA_FRONTEND_JB64_SRCS)
 
 # UART
 SRCS += $(LIB_PATH)/uart/src/uart_types.vhd