- made time specs in SDRAM_config independent of SDRAM clock

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git-svn-id: http://moon:8086/svn/vhdl/trunk@718 cc03376c-175c-47c8-b038-4cd826a8556b

projects/mips_sys/src/mips_sys.vhd

@@ -846,7 +846,7 @@ inst_uart_wb_1 : uart_wb
 inst_clockgen : entity work.clockgen
 	GENERIC MAP
 	(
-		clk_in_freq_hz			=> 100E6,
+		clk_in_freq_hz			=> sys_freq,
 		vga_clk_out_freq_hz		=> tsvga.f_pxl_clk,
 		sdr_clk0_out_phaseshift	=> 0,
 		sdr_clk1_out_phaseshift	=> 0
@@ -871,7 +871,8 @@ inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
 	GENERIC MAP
 	(
 		BL					=> BURST_LEN,
-		f_sysclk			=> ddr_frequency_hz,
+		f_sysclk_hz			=> sys_freq,
+		f_sdrclk_hz			=> ddr_frequency_hz,
 		fifo_depth			=> 5
 	)
 	PORT MAP