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- sdram_ctrl_frontend_wb32.vhd.vhd implements J-Bus interface and exports abstract PHY interface

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- ctrl_ddr_wb32 wraps sdram_ctrl_frontend_wb32 and adds specific PHY. This is now our new top level file

git-svn-id: http://moon:8086/svn/vhdl/trunk@1197 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2015-05-24 09:29:34 +00:00
parent 678f09b925
commit b828537c4d
5 changed files with 195 additions and 43 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.fdo
+5 -5
View File
@@ -18,13 +18,13 @@ vcom -explicit -93 "../src/sdram_ctrl.vhd"
vcom -explicit -93 "../src/ddr_clk_virtex4.vhd"
vcom -explicit -93 "../src/ddr_phy_virtex4.vhd"
vcom -explicit -93 "../src/sdram_ctrl_top.vhd"
vcom -explicit -93 "../src/sdram_ctrl_frontend64_wb.vhd"
vcom -explicit -93 "../src/ctrl_ddr_wb.vhd"
vcom -explicit -93 "../src/sdram_ctrl_frontend_wb32.vhd"
vcom -explicit -93 "../src/ctrl_ddr_wb32.vhd"
vcom -explicit -93 "../src/mt46v16m16.vhd"
vcom -explicit -93 "../src/tb_ctrl_ddr_wb.vhd"
vcom -explicit -93 "../src/tb_ctrl_ddr_wb32.vhd"
vsim -t 1ps -lib work tb_ctrl_ddr_wb
do {tb_ctrl_ddr_wb.wdo}
vsim -t 1ps -lib work tb_ctrl_ddr_wb32
do {tb_ctrl_ddr_wb32.wdo}
view wave
view structure
view signals
lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_ddr_wb32.wdo
+30 -32
View File
@@ -1,40 +1,38 @@
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider J-Bus
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/clk_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/rst_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/cyc_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/stb_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/we_o
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/sel_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/ack_i
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/mrdy_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/srdy_i
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/addr_o
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/dat_i
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/dat_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/clk_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/rst_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/cyc_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/stb_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/we_o
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/sel_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/ack_i
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/mrdy_o
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/srdy_i
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/addr_o
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_i
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dat_o
add wave -noupdate -divider SDRAM
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/sdclk
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/sdclk_fb
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_clk_p
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_clk_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_cke
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_cs_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_we_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_ras_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/part_cas_n
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/part_ba
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/part_dm
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/part_dqs
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/part_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/part_data
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/sdclk_fb
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_p
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_clk_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cke
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cs_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_we_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_ras_n
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/part_cas_n
add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_ba
add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dm
add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/part_dqs
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/part_data
add wave -noupdate -divider Test
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/sd_cmd
add wave -noupdate -format Logic /tb_ctrl_ddr_wb/dout_rst
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/sddat
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/sdsel
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb/dout_reg
add wave -noupdate -format Literal /tb_ctrl_ddr_wb/dout_cnt
add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/sd_cmd
add wave -noupdate -format Logic /tb_ctrl_ddr_wb32/dout_rst
add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_ddr_wb32/dout_reg
add wave -noupdate -format Literal /tb_ctrl_ddr_wb32/dout_cnt
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {189465865 ps} 0}
configure wave -namecolwidth 150