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This commit was manufactured by cvs2svn to create tag 'MIPS_R12'.

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git-svn-id: http://moon:8086/svn/vhdl/tags/MIPS_R12@934 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2011-07-24 08:18:46 +00:00
parent faa81b57e9
commit aef784643a
396 changed files with 4562 additions and 83217 deletions
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lib/ps2_port/src/ps2_core.vhd
+2 -2
View File
@@ -29,7 +29,7 @@ USE IEEE.NUMERIC_STD.ALL;
entity ps2_core is
Generic
(
f_sys_clk : real := 100.0
f_sys_clk_hz : integer := 100E6
);
Port
(
@@ -69,7 +69,7 @@ type line_state_tx_t is (tx_idle_st, tx_clock_assert_st, tx_start_latency_st,
tx_ack_trans_st, tx_ack_sample_st, tx_valid_st);
-- Constant
constant prescaler_us : integer := integer(f_sys_clk);
constant prescaler_us : integer := f_sys_clk_hz/1E6;
constant timeout_us : integer := 15000;
constant time_clock_assert : integer := 120;
constant time_clock_abort : integer := 500;
lib/ps2_port/src/ps2_wb.vhd
+2 -2
View File
@@ -5,7 +5,7 @@ USE IEEE.NUMERIC_STD.ALL;
ENTITY ps2_wb IS
Generic
(
f_sys_clk : real := 100.0
f_sys_clk_hz : integer := 100E6
);
Port
(
@@ -118,7 +118,7 @@ irq_register:
inst_ps2_core: entity work.ps2_core
GENERIC MAP
(
f_sys_clk => f_sys_clk
f_sys_clk_hz => f_sys_clk_hz
)
PORT MAP
(