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- made ram sizable

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git-svn-id: http://moon:8086/svn/vhdl/trunk@979 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2013-07-20 09:53:34 +00:00
parent a43bcf23af
commit a836d35ee1
4 changed files with 21 additions and 6 deletions
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lib/misc/tb_ram_wb.vhd
+10 -4
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@@ -32,7 +32,9 @@ END tb_ram_wb;
ARCHITECTURE behavior OF tb_ram_wb IS
constant CLK_PERIOD : time := 10 ns;
constant CLK_PERIOD : time := 10 ns;
constant RAM_NUM_WORDS : integer := 256;
signal CLK_O : std_logic := '1';
signal RST_O : std_logic := '1';
signal CYC_O : std_logic := '0';
@@ -53,6 +55,10 @@ ARCHITECTURE behavior OF tb_ram_wb IS
BEGIN
inst_ram_wb : entity work.ram_wb
GENERIC MAP
(
NUM_WORDS => RAM_NUM_WORDS
)
PORT MAP
(
RST_I => RST_O,
@@ -214,7 +220,7 @@ STIMULUS: process
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
wait until rising_edge(CLK_O);
CYC_O <= '0';
@@ -258,7 +264,7 @@ STIMULUS: process
DAT_O <= X"DEADBEEF";
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
wait until rising_edge(CLK_O);
CYC_O <= '0';
wait for 3*CLK_PERIOD;
@@ -270,7 +276,7 @@ STIMULUS: process
ADDR_O <= X"0000_0080";
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
wait until rising_edge(CLK_O);
CYC_O <= '0';
-- 8-word burst cycle