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- added ethernet MAC

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git-svn-id: http://moon:8086/svn/vhdl/trunk@845 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-03-28 23:29:27 +00:00
parent 904ec64a52
commit a6ba2eeec5
1 changed files with 59 additions and 4 deletions
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projects/mips_sys/src/mips_sys.vhd
+59 -4
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@@ -131,6 +131,18 @@ PORT
sys_phy_mdio : inout std_logic;
sys_phy_int : in std_logic;
sys_phy_rx_clk : in STD_LOGIC;
sys_phy_rx_dv : in STD_LOGIC;
sys_phy_rx_er : in STD_LOGIC;
sys_phy_rx : in unsigned(7 downto 0);
sys_phy_tx_clk : in STD_LOGIC;
sys_phy_tx_en : out STD_LOGIC;
sys_phy_tx_er : out STD_LOGIC;
sys_phy_tx : out unsigned(7 downto 0);
sys_phy_gtx_clk : out STD_LOGIC;
sys_phy_crs : in STD_LOGIC;
sys_phy_col : in STD_LOGIC;
sys_error : out unsigned(1 downto 0) -- indicates Errors
);
@@ -461,6 +473,12 @@ ARCHITECTURE behavior OF mips_sys IS
signal SRDY_O_ps2_1 : std_logic;
signal SDAT_O_ps2_1 : unsigned(31 downto 0);
signal INT_O_emac : std_logic;
signal CYC_I_emac : std_logic;
signal ACK_O_emac : std_logic;
signal SRDY_O_emac : std_logic;
signal SDAT_O_emac : unsigned(31 downto 0);
signal gpi_0 : unsigned(31 downto 0);
signal gpo_0 : unsigned(31 downto 0);
@@ -480,7 +498,7 @@ ARCHITECTURE behavior OF mips_sys IS
-- attribute rom_style of cpu_cpu_write_fifo_dout: signal is "DISTRIBUTED";
-- attribute rom_style of cpu_read_fifo_dout: signal is "DISTRIBUTED";
type mem_area_t is (mem_dead, mem_flash, mem_usb, mem_rom, mem_gpio, mem_uart0, mem_uart1, mem_ps2_0, mem_ps2_1, mem_sdram, mem_vga, mem_ac97);
type mem_area_t is (mem_dead, mem_flash, mem_usb, mem_rom, mem_gpio, mem_uart0, mem_uart1, mem_ps2_0, mem_ps2_1, mem_sdram, mem_vga, mem_ac97, mem_emac);
signal mem_area : mem_area_t;
attribute KEEP : string;
@@ -580,7 +598,7 @@ int_sample:
process(CLK_O)
begin
if rising_edge(CLK_O) then
INT <= int_timer & (INT_O_ps2_0 or INT_O_ps2_1) & (INT_O_vga or (ac97_inten and INT_O_ac97)) & (usb_inten and sys_usb_int) & (int_uart0 or int_uart1) & sys_btn(4);
INT <= int_timer & (INT_O_ps2_0 or INT_O_ps2_1 or INT_O_emac) & (INT_O_vga or (ac97_inten and INT_O_ac97)) & (usb_inten and sys_usb_int) & (int_uart0 or int_uart1) & sys_btn(4);
end if;
end process;
@@ -612,6 +630,8 @@ mem_mux:
mem_area <= mem_vga;
elsif ADDR_O(18 downto 16) = "100" then
mem_area <= mem_ac97;
elsif ADDR_O(18 downto 16) = "101" then
mem_area <= mem_emac;
end if;
elsif ADDR_O(27 downto 26) = "01" then
mem_area <= mem_flash;
@@ -638,6 +658,7 @@ signal_mux:
CYC_I_sdram <= '0';
CYC_I_vga <= '0';
CYC_I_ac97 <= '0';
CYC_I_emac <= '0';
case mem_area is
@@ -674,6 +695,9 @@ signal_mux:
when mem_ac97 =>
CYC_I_ac97 <= CYC_O;
when mem_emac =>
CYC_I_emac <= CYC_O;
when others => null;
end case;
@@ -681,8 +705,8 @@ signal_mux:
end process;
------------------------------------------------------------------
SRDY_I <= SRDY_O_flash or SRDY_O_usb or SRDY_O_sdram or SRDY_O_rom or SRDY_O_uart0 or SRDY_O_uart1 or SRDY_O_ps2_0 or SRDY_O_ps2_1 or SRDY_O_gpio or SRDY_O_vga or SRDY_O_ac97;
ACK_I <= ACK_O_flash or ACK_O_usb or ACK_O_sdram or ACK_O_rom or ACK_O_uart0 or ACK_O_uart1 or ACK_O_ps2_0 or ACK_O_ps2_1 or ACK_O_gpio or ACK_O_vga or ACK_O_ac97;
SRDY_I <= SRDY_O_flash or SRDY_O_usb or SRDY_O_sdram or SRDY_O_rom or SRDY_O_uart0 or SRDY_O_uart1 or SRDY_O_ps2_0 or SRDY_O_ps2_1 or SRDY_O_gpio or SRDY_O_vga or SRDY_O_ac97 or SRDY_O_emac;
ACK_I <= ACK_O_flash or ACK_O_usb or ACK_O_sdram or ACK_O_rom or ACK_O_uart0 or ACK_O_uart1 or ACK_O_ps2_0 or ACK_O_ps2_1 or ACK_O_gpio or ACK_O_vga or ACK_O_ac97 or ACK_O_emac;
MDAT_I <= SDAT_O_sdram(31 downto 0) when CYC_I_sdram = '1' else
SDAT_O_rom when CYC_I_rom = '1' else
SDAT_O_flash when CYC_I_flash = '1' else
@@ -693,6 +717,7 @@ signal_mux:
SDAT_O_ps2_1 when CYC_I_ps2_1 = '1' else
SDAT_O_vga when CYC_I_vga = '1' else
SDAT_O_ac97 when CYC_I_ac97 = '1' else
SDAT_O_emac when CYC_I_emac = '1' else
SDAT_O_gpio when CYC_I_gpio = '1' else X"DEADBEEF";
------------------------------------------------------------------
@@ -1106,5 +1131,35 @@ inst_ps2_phy_1: entity work.ps2_phy
tx_data => ps2_1_data_tx
);
inst_emac_top_jb : entity work.emac_top_jb
PORT MAP
(
CLK_I => CLK_O,
RST_I => RST_O,
INT_O => INT_O_emac,
CYC_I => CYC_I_emac,
STB_I => STB_O,
SEL_I => SEL_O(3 downto 0),
WE_I => WE_O,
ACK_O => ACK_O_emac,
SRDY_O => SRDY_O_emac,
MRDY_I => MRDY_O,
ADDR_I => ADDR_O,
DAT_I => MDAT_O(31 downto 0),
DAT_O => SDAT_O_emac,
mii_rx_clk => sys_phy_rx_clk,
mii_rx_dv => sys_phy_rx_dv,
mii_rx_er => sys_phy_rx_er,
mii_rx => sys_phy_rx,
mii_tx_clk => sys_phy_tx_clk,
mii_tx_en => sys_phy_tx_en,
mii_tx_er => sys_phy_tx_er,
mii_tx => sys_phy_tx,
mii_gtx_clk => sys_phy_gtx_clk,
mii_crs => sys_phy_crs,
mii_col => sys_phy_col
);
------------------------------------------------------------------
END;