- adde SIPO and PISO

git-svn-id: http://moon:8086/svn/vhdl/trunk@1263 cc03376c-175c-47c8-b038-4cd826a8556b
2015-05-30 12:27:20 +00:00
parent 5e4798bbab
commit 99b30ba0cc
4 changed files with 150 additions and 26 deletions
@@ -19,6 +19,8 @@ vcom -explicit  -93 "../src/sdram_ctrl.vhd"
 vcom -explicit  -93 "../src/sdr_clk_cycloneive.vhd"
 vcom -explicit  -93 "../src/sdr_phy_de0nano.vhd"
 vcom -explicit  -93 "../src/sdram_ctrl_top.vhd"
+vcom -explicit  -93 "../../../emac/src/piso.vhd"
+vcom -explicit  -93 "../../../emac/src/sipo.vhd"
 vcom -explicit  -93 "../src/sdram_ctrl_frontend_wb16.vhd"
 vcom -explicit  -93 "../src/ctrl_sdr_wb32.vhd"
 vcom -explicit  -93 "../src/mti_pkg.vhd"
@@ -30,4 +32,4 @@ do {tb_ctrl_sdr_wb32_de0nano.wdo}
 view wave
 view structure
 view signals
-run 120us
+run 220us
@@ -32,6 +32,65 @@ add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/part_dqm
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sd_cmd
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_addr
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_data
+add wave -noupdate -divider Frontend
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/f_sysclk
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/f_sdrclk
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/fifo_depth
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/rst_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/clk_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/sdram_rst0
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/sdram_clk0
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cyc_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/stb_i
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/sel_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/we_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/ack_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/mrdy_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/srdy_o
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/addr_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/dat_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/dat_o
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/phy_ctrl
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/phy_in
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/phy_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/u_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/u_tag_in
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/u_cmd
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/u_cmd_we
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/u_busy
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/rdy
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_din
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_dout
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_re
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_we
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_full
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cat_fifo_empty
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_din
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_dout
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_re
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_we
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_full
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_empty
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_din
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_dout
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_re
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_we
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_full
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_empty
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_data_avail
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_rdy
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_data_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/read_fifo_data_in
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_dm_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_data_out
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_dm_in
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/write_fifo_data_in
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/addr_fifo_out
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/tag_fifo_out
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cmd_fifo_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/addr_fifo_in
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/tag_fifo_in
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/cmd_fifo_in
 add wave -noupdate -divider PHY
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/f_sdrclk
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/rst
@@ -39,7 +98,7 @@ add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk_fb
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk0_out
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/rst0_out
-add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_in
+add wave -noupdate -format Literal -radix hexadecimal -expand /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_in
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_out
 add wave -noupdate -format Literal -expand /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_ctrl
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_clk
@@ -53,7 +112,6 @@ add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_we_n
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_cas_n
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_ras_n
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_cke
-add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/drive
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/data_reg_r
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_ctrl_reg
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/we_reg
@@ -81,7 +139,6 @@ add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb1
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cc_load_en
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cycle_finished
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cycle_cnt
-add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_load_en
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_finished
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_cnt
 add wave -noupdate -divider {Main FSM}
@@ -130,7 +187,7 @@ add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_activate
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_clr
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {82985000 ps} 0}
+WaveRestoreCursors {{Cursor 1} {119326322 ps} 0}
 configure wave -namecolwidth 150
 configure wave -valuecolwidth 100
 configure wave -justifyvalue left