- simplified: removed MII-FIFO. Connected RAM to MII-domain
Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@857 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
+95
-289
@@ -37,13 +37,6 @@ ARCHITECTURE behavior OF emac_rx IS
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subtype word_ptr_t is unsigned(RAM_ADDR_WIDTH-1 downto 0);
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-- Signals for EMAC connections
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signal mii_fifo_din : unsigned(31 downto 0);
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signal mii_fifo_dout : unsigned(31 downto 0);
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signal mii_fifo_we : std_logic;
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signal mii_fifo_re : std_logic;
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signal mii_fifo_empty : std_logic;
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signal mii_fifo_full : std_logic;
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signal cmd_fifo_din : unsigned(2*word_ptr_t'length+2 downto 0);
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signal cmd_fifo_dout : unsigned(2*word_ptr_t'length+2 downto 0);
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signal cmd_fifo_we : std_logic;
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@@ -60,24 +53,19 @@ ARCHITECTURE behavior OF emac_rx IS
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signal xfer_ram_limit : word_ptr_t;
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signal xfer_ram_full : std_logic;
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signal xfer_base : word_ptr_t;
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signal xfer_size : word_ptr_t;
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signal xfer_ptr : word_ptr_t;
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signal xfer_ptr_set : std_logic;
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signal xfer_ptr_adv : std_logic;
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signal xfer_cnt_set : std_logic;
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signal xfer_cnt_adv : std_logic;
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signal xfer_rdy : std_logic;
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signal xfer_en : std_logic;
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signal xfer_set : std_logic;
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signal xfer_vld : std_logic;
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signal xfer_promiscious : std_logic;
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signal ram_en_a : std_logic;
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signal ram_we_a : std_logic;
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signal ram_addr_a : word_ptr_t;
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signal ram_din_a : unsigned(31 downto 0);
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signal ram_dout_a : unsigned(31 downto 0);
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signal ram_dout_b : unsigned(31 downto 0);
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signal ram_en_b : std_logic;
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signal ram_we_b : std_logic;
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signal ram_addr_b : word_ptr_t;
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signal ram_din_b : unsigned(31 downto 0);
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signal sipo_32bit_dout : unsigned(31 downto 0);
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signal sipo_32bit_dout_be : unsigned(3 downto 0);
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@@ -96,16 +84,6 @@ ARCHITECTURE behavior OF emac_rx IS
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signal byte_count : word_ptr_t;
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signal byte_count_reg : word_ptr_t;
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signal word_count : word_ptr_t;
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signal word_count_en : std_logic;
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signal size_fifo_full : std_logic;
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signal size_fifo_empty : std_logic;
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signal size_fifo_we : std_logic;
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signal size_fifo_re : std_logic;
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signal size_fifo_din : unsigned(2*word_ptr_t'length+2 downto 0);
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signal size_fifo_dout : unsigned(2*word_ptr_t'length+2 downto 0);
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signal reset_pipe : unsigned(31 downto 0);
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signal preamble_rst : std_logic;
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@@ -125,36 +103,21 @@ ARCHITECTURE behavior OF emac_rx IS
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type host_state_t is (host_init, host_flush, host_idle);
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signal host_s, host_sn : host_state_t;
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type xfer_state_t is (xfer_init, xfer_idle, xfer_setup, xfer_active, xfer_drop, xfer_commit, xfer_free);
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type xfer_state_t is (xfer_init, xfer_reset, xfer_idle, xfer_setup, xfer_active, xfer_stop, xfer_finish);
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signal xfer_s, xfer_sn : xfer_state_t;
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type stream_state_t is (stream_init, stream_reset, stream_idle, stream_active, stream_stop, stream_finish);
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signal stream_s, stream_sn : stream_state_t;
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alias cmd_mac_ok_in is cmd_fifo_din(cmd_fifo_din'left);
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alias cmd_bcast_in is cmd_fifo_din(cmd_fifo_din'left-1);
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alias cmd_invalid_in is cmd_fifo_din(cmd_fifo_din'left-2);
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alias cmd_pkt_lost_in is cmd_fifo_din(cmd_fifo_din'left-2);
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alias cmd_nbytes_in is cmd_fifo_din(word_ptr_t'length-1 downto 0);
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alias cmd_base_in is cmd_fifo_din(2*word_ptr_t'length-1 downto word_ptr_t'length);
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alias cmd_mac_ok_out is cmd_fifo_dout(cmd_fifo_dout'left);
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alias cmd_bcast_out is cmd_fifo_dout(cmd_fifo_dout'left-1);
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alias cmd_invalid_out is cmd_fifo_dout(cmd_fifo_dout'left-2);
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alias cmd_pkt_lost_out is cmd_fifo_dout(cmd_fifo_dout'left-2);
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alias cmd_nbytes_out is cmd_fifo_dout(word_ptr_t'length-1 downto 0);
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alias cmd_base_out is cmd_fifo_dout(2*word_ptr_t'length-1 downto word_ptr_t'length);
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alias stream_mac_ok_in is size_fifo_din(size_fifo_din'left);
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alias stream_broadcast_in is size_fifo_din(size_fifo_din'left-1);
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alias stream_badcrc_in is size_fifo_din(size_fifo_din'left-2);
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alias stream_nbytes_in is size_fifo_din(word_ptr_t'length-1 downto 0);
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alias stream_nwords_in is size_fifo_din(2*word_ptr_t'length-1 downto word_ptr_t'length);
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alias stream_mac_ok_out is size_fifo_dout(size_fifo_dout'left);
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alias stream_broadcast_out is size_fifo_dout(size_fifo_dout'left-1);
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alias stream_badcrc_out is size_fifo_dout(size_fifo_dout'left-2);
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alias stream_nbytes_out is size_fifo_dout(word_ptr_t'length-1 downto 0);
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alias stream_nwords_out is size_fifo_dout(2*word_ptr_t'length-1 downto word_ptr_t'length);
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begin
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ctrl_out.rx_size <= resize(cmd_nbytes_out, 16);
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@@ -163,37 +126,29 @@ begin
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ctrl_out.reset_busy <= reset_en;
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ctrl_out.pkt_bcast <= cmd_bcast_out;
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ctrl_out.pkt_mac_match <= cmd_mac_ok_out;
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dout <= ram_dout_a;
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mii_fifo_din <= sipo_32bit_dout;
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mii_fifo_we <= word_count_en and sipo_32bit_dout_vld;
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ram_en_a <= '1';
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ram_din_a <= (others => '-');
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ram_addr_a <= fill_ptr;
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ram_we_a <= '0';
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ctrl_out.pkt_lost <= cmd_pkt_lost_out;
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dout <= ram_dout_b;
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ram_en_b <= '1';
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ram_din_b <= mii_fifo_dout;
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ram_addr_b <= xfer_ptr;
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ram_we_b <= xfer_ptr_adv;
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ram_addr_b <= fill_ptr;
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ram_en_a <= '1';
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ram_din_a <= sipo_32bit_dout;
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ram_addr_a <= xfer_ptr;
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ram_we_a <= xfer_en and sipo_32bit_dout_vld;
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xfer_vld <= not xfer_ram_full and (mac_chk_OK or mac_chk_BC or ctrl_in.promiscious);
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cmd_fifo_we <= commit_en;
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cmd_fifo_re <= ctrl_in.pkt_free_en;
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cmd_mac_ok_in <= stream_mac_ok_out;
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cmd_bcast_in <= stream_broadcast_out;
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cmd_invalid_in <= stream_badcrc_out;
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cmd_nbytes_in <= stream_nbytes_out;
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cmd_mac_ok_in <= mac_chk_OK;
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cmd_bcast_in <= mac_chk_BC;
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cmd_nbytes_in <= byte_count_reg;
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cmd_base_in <= xfer_base;
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cmd_pkt_lost_in <= xfer_ram_full;
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stream_nbytes_in <= byte_count_reg;
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stream_nwords_in <= word_count;
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stream_mac_ok_in <= mac_chk_OK;
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stream_broadcast_in <= mac_chk_BC;
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stream_badcrc_in <= '0';
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reset_en <= reset_pipe(reset_pipe'left);
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------------------------------------------------------------------
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@@ -228,100 +183,19 @@ fill_pointer:
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------------------------------------------------------------------
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-- Transfer stuff
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------------------------------------------------------------------
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xfer_state_next:
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process(clk)
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host2xfer_sync_register:
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process(mii_rx_clk)
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begin
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if rising_edge(clk) then
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if reset_en = '1' then
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xfer_s <= xfer_init;
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else
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xfer_s <= xfer_sn;
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end if;
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end if;
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end process;
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xfer_state:
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process(xfer_s, size_fifo_empty, mii_fifo_empty, xfer_rdy, xfer_vld, xfer_ram_full)
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begin
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commit_en <= '0';
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xfer_ptr_set <= '0';
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xfer_ptr_adv <= '0';
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xfer_cnt_set <= '0';
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xfer_cnt_adv <= '0';
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size_fifo_re <= '0';
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mii_fifo_re <= '0';
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xfer_sn <= xfer_s;
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case xfer_s is
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when xfer_init =>
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xfer_sn <= xfer_idle;
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when xfer_idle =>
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if mii_fifo_empty = '0' then
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xfer_sn <= xfer_setup;
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end if;
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when xfer_setup =>
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xfer_cnt_set <= '1';
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xfer_ptr_set <= '1';
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xfer_sn <= xfer_active;
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when xfer_active =>
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mii_fifo_re <= '1';
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xfer_cnt_adv <= not mii_fifo_empty;
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xfer_ptr_adv <= not mii_fifo_empty;
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if xfer_ram_full = '1' then
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xfer_sn <= xfer_drop;
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elsif size_fifo_empty = '0' then
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if xfer_rdy = '1' then
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xfer_sn <= xfer_free;
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end if;
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end if;
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when xfer_drop =>
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mii_fifo_re <= '1';
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xfer_cnt_adv <= not mii_fifo_empty;
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if size_fifo_empty = '0' then
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if xfer_rdy = '1' then
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xfer_sn <= xfer_free;
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end if;
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end if;
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when xfer_free =>
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size_fifo_re <= '1';
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commit_en <= not xfer_ram_full and xfer_vld;
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xfer_sn <= xfer_idle;
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when others =>
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xfer_sn <= xfer_idle;
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end case;
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end process;
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------------------------------------------------------------------
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pkt_lost_register:
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process(clk)
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begin
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if rising_edge(clk) then
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if reset_en = '1' then
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ctrl_out.pkt_lost <= '0';
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elsif size_fifo_re = '1' and xfer_ram_full = '1' then
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ctrl_out.pkt_lost <= '1';
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elsif ctrl_in.pkt_free_en = '1' then
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ctrl_out.pkt_lost <= '0';
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end if;
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if rising_edge(mii_rx_clk) then
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xfer_promiscious <= ctrl_in.promiscious;
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end if;
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end process;
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xfer_limit_register:
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process(clk)
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process(mii_rx_clk)
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begin
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if rising_edge(clk) then
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if xfer_ptr_set = '1' then
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if rising_edge(mii_rx_clk) then
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if xfer_set = '1' then
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if cmd_fifo_empty = '1' then
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xfer_ram_limit <= xfer_base - 1;
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else
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@@ -333,12 +207,12 @@ xfer_limit_register:
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end process;
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xfer_ram_full_detect:
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process(clk)
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process(mii_rx_clk)
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begin
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if rising_edge(clk) then
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if xfer_ptr_set = '1' or reset_en = '1' then
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if rising_edge(mii_rx_clk) then
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if xfer_set = '1' or reset_en = '1' then
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xfer_ram_full <= '0';
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elsif xfer_ptr_adv = '1' then
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elsif xfer_en = '1' and sipo_32bit_dout_vld = '1' then
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if xfer_ptr = xfer_ram_limit then
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xfer_ram_full <= '1';
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end if;
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@@ -347,43 +221,10 @@ xfer_ram_full_detect:
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end process;
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xfer_counter:
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process(clk)
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begin
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if rising_edge(clk) then
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if xfer_cnt_set = '1' then
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xfer_rdy <= '0';
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xfer_vld <= '0';
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elsif xfer_size = stream_nwords_out then
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xfer_rdy <= '1';
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xfer_vld <= stream_mac_ok_out or stream_broadcast_out or ctrl_in.promiscious;
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end if;
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if xfer_cnt_set = '1' then
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xfer_size <= (others => '0');
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elsif xfer_cnt_adv = '1' then
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xfer_size <= xfer_size + 1;
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end if;
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end if;
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end process;
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xfer_pointer:
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process(clk)
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begin
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if rising_edge(clk) then
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if xfer_ptr_set = '1' then
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xfer_ptr <= xfer_base;
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elsif xfer_ptr_adv = '1' then
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xfer_ptr <= xfer_ptr + 1;
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end if;
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end if;
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end process;
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xfer_base_logic:
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process(clk)
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process(mii_rx_clk)
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begin
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if rising_edge(clk) then
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if rising_edge(mii_rx_clk) then
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if reset_en = '1' then
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xfer_base <= (others => '0');
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elsif commit_en = '1' then
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@@ -392,6 +233,19 @@ xfer_base_logic:
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end if;
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end process;
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xfer_pointer:
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process(mii_rx_clk)
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begin
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if rising_edge(mii_rx_clk) then
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if xfer_set = '1' then
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xfer_ptr <= xfer_base;
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elsif xfer_en = '1' and sipo_32bit_dout_vld = '1' then
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xfer_ptr <= xfer_ptr + 1;
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end if;
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end if;
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end process;
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------------------------------------------------------------------
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byte_counter:
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process(mii_rx_clk)
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@@ -415,18 +269,6 @@ byte_count_register:
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end if;
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end process;
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word_counter:
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process(mii_rx_clk)
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begin
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if rising_edge(mii_rx_clk) then
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if sipo_32bit_rst = '1' then
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word_count <= (others => '0');
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elsif word_count_en = '1' and sipo_32bit_dout_vld = '1' then
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word_count <= word_count + 1;
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end if;
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end if;
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end process;
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preamble_sync_logic:
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process(mii_rx_clk)
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begin
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@@ -487,88 +329,97 @@ mac_check_logic:
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end process;
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------------------------------------------------------------------
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stream_state_next:
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xfer_state_next:
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process(mii_rx_clk)
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begin
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if rising_edge(mii_rx_clk) then
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if reset_en = '1' then
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stream_s <= stream_init;
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xfer_s <= xfer_init;
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else
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stream_s <= stream_sn;
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xfer_s <= xfer_sn;
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end if;
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end if;
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end process;
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stream_state:
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process(stream_s, reset_en, sipo_8bit_dout_en, sipo_8bit_dout, sipo_32bit_dout_en, sipo_32bit_dout_vld, preamble_rdy, preamble_OK)
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xfer_state:
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process(xfer_s, reset_en, sipo_8bit_dout_en, sipo_8bit_dout, sipo_32bit_dout_en, sipo_32bit_dout_vld, preamble_rdy, preamble_OK, xfer_ram_full, xfer_vld)
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begin
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commit_en <= '0';
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xfer_set <= '0';
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xfer_en <= '0';
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sipo_32bit_en <= '0';
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sipo_32bit_rst <= reset_en;
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sipo_8bit_rst <= reset_en;
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word_count_en <= '0';
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byte_count_en <= '0';
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size_fifo_we <= '0';
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preamble_rst <= reset_en;
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mac_chk_rst <= reset_en;
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sipo_32bit_en <= sipo_8bit_dout_en;
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stream_sn <= stream_s;
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xfer_sn <= xfer_s;
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case stream_s is
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case xfer_s is
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when stream_init =>
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when xfer_init =>
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if sipo_8bit_dout_en = '0' then
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stream_sn <= stream_reset;
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xfer_sn <= xfer_reset;
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end if;
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when stream_reset =>
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when xfer_reset =>
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sipo_32bit_rst <= '1';
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sipo_8bit_rst <= '1';
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preamble_rst <= '1';
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stream_sn <= stream_idle;
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xfer_sn <= xfer_idle;
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when stream_idle =>
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when xfer_idle =>
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sipo_32bit_en <= '0';
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if preamble_rdy = '1' then
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stream_sn <= stream_init;
|
||||
xfer_sn <= xfer_init;
|
||||
if preamble_OK = '1' then
|
||||
byte_count_en <= '1';
|
||||
mac_chk_rst <= '1';
|
||||
sipo_32bit_rst <= '1';
|
||||
stream_sn <= stream_active;
|
||||
xfer_sn <= xfer_setup;
|
||||
end if;
|
||||
end if;
|
||||
|
||||
when stream_active =>
|
||||
word_count_en <= sipo_32bit_dout_en;
|
||||
when xfer_setup =>
|
||||
xfer_set <= '1';
|
||||
xfer_en <= sipo_32bit_dout_en;
|
||||
byte_count_en <= sipo_8bit_dout_en;
|
||||
if sipo_8bit_dout_en = '0' then
|
||||
stream_sn <= stream_stop;
|
||||
xfer_sn <= xfer_active;
|
||||
|
||||
when xfer_active =>
|
||||
xfer_en <= sipo_32bit_dout_en;
|
||||
byte_count_en <= sipo_8bit_dout_en;
|
||||
if xfer_ram_full = '1' then
|
||||
xfer_sn <= xfer_finish;
|
||||
elsif sipo_8bit_dout_en = '0' then
|
||||
xfer_sn <= xfer_stop;
|
||||
sipo_8bit_rst <= '1';
|
||||
end if;
|
||||
|
||||
when stream_stop =>
|
||||
word_count_en <= sipo_32bit_dout_en;
|
||||
when xfer_stop =>
|
||||
xfer_en <= sipo_32bit_dout_en;
|
||||
byte_count_en <= sipo_8bit_dout_en;
|
||||
if sipo_32bit_dout_en = '0' then
|
||||
stream_sn <= stream_finish;
|
||||
xfer_sn <= xfer_finish;
|
||||
end if;
|
||||
|
||||
when stream_finish =>
|
||||
size_fifo_we <= '1';
|
||||
stream_sn <= stream_init;
|
||||
when xfer_finish =>
|
||||
commit_en <= xfer_vld;
|
||||
xfer_sn <= xfer_init;
|
||||
|
||||
when others =>
|
||||
stream_sn <= stream_init;
|
||||
xfer_sn <= xfer_init;
|
||||
end case;
|
||||
|
||||
end process;
|
||||
|
||||
------------------------------------------------------------------
|
||||
-- Instantiate synchronous FIFO
|
||||
inst_cmd_fifo: entity work.fifo_sync
|
||||
inst_cmd_fifo: entity work.fifo_async
|
||||
GENERIC MAP
|
||||
(
|
||||
addr_width => NextExpBaseTwo(RAM_SIZE) - 4, -- RAMSIZE(words)/MIN_PACKET_LEN(words)
|
||||
@@ -578,7 +429,8 @@ inst_cmd_fifo: entity work.fifo_sync
|
||||
PORT MAP
|
||||
(
|
||||
rst => reset_en,
|
||||
clk => clk,
|
||||
clk_w => mii_rx_clk,
|
||||
clk_r => clk,
|
||||
we => cmd_fifo_we,
|
||||
re => cmd_fifo_re,
|
||||
fifo_full => cmd_fifo_full,
|
||||
@@ -597,61 +449,15 @@ inst_ram : entity work.dpram_1w1r
|
||||
)
|
||||
PORT MAP
|
||||
(
|
||||
clka => clk,
|
||||
clka => mii_rx_clk,
|
||||
clkb => clk,
|
||||
en_a => ram_en_b,
|
||||
en_b => ram_en_a,
|
||||
we_a => ram_we_b,
|
||||
addr_a => ram_addr_b,
|
||||
addr_b => ram_addr_a,
|
||||
din_a => ram_din_b,
|
||||
dout_b => ram_dout_a
|
||||
);
|
||||
|
||||
-- Instantiate synchronous FIFO
|
||||
inst_mii_fifo: entity work.fifo_async
|
||||
GENERIC MAP
|
||||
(
|
||||
addr_width => 4,
|
||||
data_width => mii_fifo_din'length,
|
||||
do_last_read_update => true
|
||||
)
|
||||
PORT MAP
|
||||
(
|
||||
rst => reset_en,
|
||||
clk_w => mii_rx_clk,
|
||||
clk_r => clk,
|
||||
we => mii_fifo_we,
|
||||
re => mii_fifo_re,
|
||||
fifo_full => mii_fifo_full,
|
||||
fifo_empty => mii_fifo_empty,
|
||||
fifo_afull => open,
|
||||
fifo_aempty => open,
|
||||
data_w => mii_fifo_din,
|
||||
data_r => mii_fifo_dout
|
||||
);
|
||||
|
||||
-- Instantiate synchronous FIFO
|
||||
inst_size_fifo: entity work.fifo_async
|
||||
GENERIC MAP
|
||||
(
|
||||
addr_width => 1,
|
||||
data_width => size_fifo_din'length,
|
||||
do_last_read_update => true
|
||||
)
|
||||
PORT MAP
|
||||
(
|
||||
rst => reset_en,
|
||||
clk_w => mii_rx_clk,
|
||||
clk_r => clk,
|
||||
we => size_fifo_we,
|
||||
re => size_fifo_re,
|
||||
fifo_full => size_fifo_full,
|
||||
fifo_empty => size_fifo_empty,
|
||||
fifo_afull => open,
|
||||
fifo_aempty => open,
|
||||
data_w => size_fifo_din,
|
||||
data_r => size_fifo_dout
|
||||
en_a => ram_en_a,
|
||||
en_b => ram_en_b,
|
||||
we_a => ram_we_a,
|
||||
addr_a => ram_addr_a,
|
||||
addr_b => ram_addr_b,
|
||||
din_a => ram_din_a,
|
||||
dout_b => ram_dout_b
|
||||
);
|
||||
|
||||
inst_sipo : entity work.sipo
|
||||
|
||||
Reference in New Issue
Block a user