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- added TX_RAM_SIZE generic

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git-svn-id: http://moon:8086/svn/vhdl/trunk@806 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-03-21 14:49:51 +00:00
parent 10a5d17015
commit 88bd1e16d9
2 changed files with 22 additions and 4 deletions
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lib/emac/emac_jb.vhd
+7 -3
View File
@@ -3,10 +3,13 @@ USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
use std.textio.all; -- Imports the standard textio package.
use work.utils_pkg.all;
ENTITY emac_jb IS
Generic
(
f_sysclk : real := 100.0
f_sysclk : real := 100.0;
TX_RAM_SIZE : natural := 2048
);
Port
(
@@ -40,7 +43,8 @@ END emac_jb;
ARCHITECTURE behavior OF emac_jb IS
constant TX_RAM_ADDR_WIDTH : natural := 9;
constant TX_RAM_ADDR_WIDTH : natural := NextExpBaseTwo(TX_RAM_SIZE);
subtype word_ptr_t is unsigned(TX_RAM_ADDR_WIDTH-1 downto 0);
-- Signals for EMAC connections
@@ -118,7 +122,7 @@ ARCHITECTURE behavior OF emac_jb IS
signal piso_din_rdy : std_logic;
signal tx_data_vld : std_logic;
subtype inter_frame_gap_cnt_t is natural range 0 to natural(10.0*f_sysclk)-1;
subtype inter_frame_gap_cnt_t is natural range 0 to natural(1.0*f_sysclk)-1;
signal inter_frame_gap_cnt : inter_frame_gap_cnt_t;
signal inter_frame_gap_rdy : std_logic;
lib/emac/src/tb_emac_jb.vhd
+15 -1
View File
@@ -33,6 +33,7 @@ ARCHITECTURE behavior OF tb_emac_jb IS
constant CLK_PERIOD : time := 10 ns;
constant MII_CLK_PERIOD : time := 8 ns;
signal CLK : std_logic := '1';
signal RST : std_logic := '1';
@@ -93,7 +94,8 @@ BEGIN
inst_emac_jb : entity work.emac_jb
GENERIC MAP
(
f_sysclk => 100.0
f_sysclk => 100.0,
TX_RAM_SIZE => 2048
)
PORT MAP
(
@@ -313,6 +315,18 @@ STIMULUS: process
emac_alloc (1536);
emac_write (1536);
emac_alloc (1536);
emac_write (1536);
emac_alloc (1536);
emac_write (1536);
emac_alloc (1536);
emac_write (1536);
emac_alloc (1536);
emac_write (1536);
emac_alloc (64);
emac_write (64);