- fixed Xilinx implementation

git-svn-id: http://moon:8086/svn/vhdl/trunk@1247 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-05-27 16:28:42 +00:00
parent d4008485e3
commit 84e492a1e8
4 changed files with 301 additions and 2 deletions
+2 -2
View File
@@ -54,7 +54,7 @@ begin
end if;
end process;
inst_uart_tx: entity work.kcuart_tx
inst_uart_tx: entity work.uart_tx
port map
(
data_in => std_logic_vector(din),
@@ -69,7 +69,7 @@ inst_uart_tx: entity work.kcuart_tx
clk => clk
);
inst_uart_rx: entity work.kcuart_rx
inst_uart_rx: entity work.uart_rx
port map
(
serial_in => ser_rx,