- pulled out clkgen. vga_clk is now provided from higher level
Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@583 cc03376c-175c-47c8-b038-4cd826a8556b
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@@ -21,12 +21,12 @@ library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.NUMERIC_STD.ALL;
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use work.utils_pkg.all;
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use work.vga_types.all;
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entity vga_frontend is
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Generic
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(
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sys_freq : integer := 100E6;
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fifo_depth : integer := 2048;
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fifo_almost_full_thresh : natural := 2000;
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fifo_almost_empty_thresh : natural := 48;
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@@ -63,7 +63,8 @@ entity vga_frontend is
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SDAT_O : out unsigned(31 downto 0);
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-- VGA signals
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vga_clk_out : out std_logic;
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vga_clk_in : in std_logic;
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vga_clk_ce : in std_logic;
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vga_red : out unsigned(7 downto 0);
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vga_green : out unsigned(7 downto 0);
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vga_blue : out unsigned(7 downto 0);
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@@ -135,12 +136,9 @@ architecture Behavioral of vga_frontend is
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begin
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vga_clk_out <= vga_clk;
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inst_vga_backend : entity work.vga_backend
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GENERIC MAP
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(
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sys_freq => sys_freq,
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tsvga => tsvga
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)
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PORT MAP
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@@ -170,7 +168,8 @@ inst_vga_backend : entity work.vga_backend
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stat_vpos => stat_vpos,
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-- VGA domain signals
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vga_clk_out => vga_clk,
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vga_clk_in => vga_clk_in,
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vga_clk_ce => vga_clk_ce,
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vga_red => vga_red,
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vga_green => vga_green,
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vga_blue => vga_blue,
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@@ -200,7 +199,7 @@ inst_linefifo: entity work.fifo_async
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(
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rst => RST_I,
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clk_w => CLK_I,
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clk_r => vga_clk,
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clk_r => vga_clk_in,
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we => fifo_color_we,
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re => fifo_color_re,
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data_w => fifo_color_in,
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@@ -356,7 +355,7 @@ inst_char_gen : entity work.char_gen
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(
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rst => RST_I,
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sys_clk => CLK_I,
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vga_clk => vga_clk,
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vga_clk => vga_clk_in,
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ce => cg_en,
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frame_pulse => scan_rdy,
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clr_screen => cg_clr_screen,
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@@ -378,6 +377,7 @@ inst_char_gen : entity work.char_gen
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cg_clr_screen <= ADDR_I(5) and CYC_I and STB_I and WE_I;
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cg_clr_line <= ADDR_I(6) and CYC_I and STB_I and WE_I;
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SDAT_O <= X"0000000" & "000" & cg_rdy;
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MDAT_O <= (others => '-');
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scan_rdy <= stat_hready and stat_vready;
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cg_en <= stat_scan;
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