- FIFOs only use registered output DPRAMs

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git-svn-id: http://moon:8086/svn/vhdl/trunk@944 cc03376c-175c-47c8-b038-4cd826a8556b

lib/FIFO/sim/tb_fifo_async.fdo

@@ -3,7 +3,7 @@
 vlib work
 vcom -explicit  -93 "../src/fifo_ctrl_pkg.vhd"
 vcom -explicit  -93 "../src/gray_counter.vhd"
-vcom -explicit  -93 "../src/dpram_1w1r.vhd"
+vcom -explicit  -93 "../../rams/dpram_1w1r2c_ro_sim.vhd"
 vcom -explicit  -93 "../src/fifo_async_ctrl.vhd"
 vcom -explicit  -93 "../src/fifo_async.vhd"
 vcom -explicit  -93 "../src/tb_fifo_async.vhd"

lib/FIFO/sim/tb_fifo_sync.fdo

@@ -2,7 +2,7 @@
 ##
 vlib work
 vcom -explicit  -93 "../src/fifo_ctrl_pkg.vhd"
-vcom -explicit  -93 "../src/dpram_1w1r.vhd"
+vcom -explicit  -93 "../../rams/dpram_1w1r2c_ro_sim.vhd"
 vcom -explicit  -93 "../src/fifo_sync_ctrl.vhd"
 vcom -explicit  -93 "../src/fifo_sync.vhd"
 vcom -explicit  -93 "../src/tb_fifo_sync.vhd"

lib/FIFO/src/fifo_async.vhd

@@ -102,15 +102,15 @@ begin
 
 	);
 
-inst_dpram_1w1r: entity work.dpram_1w1r
+inst_dpram_1w1r2c: entity work.dpram_1w1r2c_ro
 	GENERIC MAP
 	(
 		addr_width	=> addr_width,
 		data_width	=> data_width
 	)
 	PORT MAP(
-		clka		=> clk_w,
-		clkb		=> clk_r,
+		clk_a		=> clk_w,
+		clk_b		=> clk_r,
 		en_a		=> '1',
 		en_b		=> mem_rd_en,
 		we_a		=> mem_wr_en,

lib/FIFO/src/fifo_sync.vhd

@@ -101,15 +101,15 @@ inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl
 
 	);
 
-inst_dpram_1w1r: entity work.dpram_1w1r
+inst_dpram_1w1r2c: entity work.dpram_1w1r2c_ro
 	GENERIC MAP
 	(
 		addr_width	=> addr_width,
 		data_width	=> data_width
 	)
 	PORT MAP(
-		clka		=> clk,
-		clkb		=> clk,
+		clk_a		=> clk,
+		clk_b		=> clk,
 		en_a		=> '1',
 		en_b		=> mem_rd_en,
 		we_a		=> mem_wr_en,

lib/FIFO/src/tb_fifo_sync.vhd

@@ -69,7 +69,8 @@ BEGIN
 		data_width					=> DATA_WIDTH,
 		addr_width					=> ADDR_WIDTH,
 		almost_full_thresh			=> 6,
-		almost_empty_thresh	=> 2
+		almost_empty_thresh			=> 2,
+		do_last_read_update			=> false
 	)
 	PORT MAP
 	(