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- cleaned up

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- reorderd registers
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git-svn-id: http://moon:8086/svn/vhdl/trunk@968 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2013-05-12 17:03:18 +00:00
parent bd6adf0ff7
commit 697dc4f0d3
3 changed files with 97 additions and 86 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/VGA_ctrl/src/tb_vga_frontend64.vhd
+42 -42
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@@ -569,12 +569,12 @@ STIMULUS: process
reg_write(X"0000_0018", X"4000_0000"); -- set frontbuffer address
reg_write(X"0000_001C", X"4000_0000"); -- set backbuffer address
reg_write(X"0000_0020", X"0000_0002"); -- set BLIT source address 0
reg_write(X"0000_0028", X"0000_0002"); -- set BLIT source dimension 0
reg_write(X"0000_0030", X"0000_0002"); -- set BLIT source address 1
reg_write(X"0000_0038", X"0000_0002"); -- set BLIT source dimension 1
reg_write(X"0000_0050", X"0000_0002"); -- set BLIT destination address
reg_write(X"0000_0058", X"0000_0002"); -- set BLIT destination dimension
reg_write(X"0000_0020", X"0000_0000"); -- set BLIT source address 0
reg_write(X"0000_0024", X"0000_0000"); -- set BLIT source dimension 0
reg_write(X"0000_0030", X"0000_0000"); -- set BLIT source address 1
reg_write(X"0000_0034", X"0000_0000"); -- set BLIT source dimension 1
reg_write(X"0000_0040", X"0000_0000"); -- set BLIT destination address
reg_write(X"0000_0044", X"0000_0000"); -- set BLIT destination dimension
-- Enable master
reg_write(X"0000_0000", X"0000_0002");
@@ -731,22 +731,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0000");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0000");
reg_write(X"0000_0040", X"0000_0000");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");
@@ -771,22 +771,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0004");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0000");
reg_write(X"0000_0040", X"0000_0000");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");
@@ -812,22 +812,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0000");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0004");
reg_write(X"0000_0040", X"0000_0004");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");
@@ -852,22 +852,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0004");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0004");
reg_write(X"0000_0040", X"0000_0004");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");
@@ -894,22 +894,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0000");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0000");
reg_write(X"0000_0040", X"0000_0000");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");
@@ -936,22 +936,22 @@ STIMULUS: process
reg_write(X"0000_0020", X"0000_0000");
-- set src dim-x
reg_write(X"0000_0028", to_unsigned(4*32, 32));
reg_write(X"0000_0024", to_unsigned(32, 32));
-- set destination start address
reg_write(X"0000_0050", X"0000_0004");
reg_write(X"0000_0040", X"0000_0004");
-- set constant color
reg_write(X"0000_0054", const_color);
reg_write(X"0000_0058", const_color);
-- set dst dim-x
reg_write(X"0000_0058", to_unsigned(4*32, 32));
reg_write(X"0000_0044", to_unsigned(32, 32));
-- set nx
reg_write(X"0000_0060", to_unsigned(blit_size_x(i), 32));
reg_write(X"0000_0050", to_unsigned(blit_size_x(i), 32));
-- set ny
reg_write(X"0000_0064", to_unsigned(blit_size_y(i), 32));
reg_write(X"0000_0054", to_unsigned(blit_size_y(i), 32));
-- set blit request
reg_read(X"0000_0000");