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- removed RAM-init during synthesizing

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git-svn-id: http://moon:8086/svn/vhdl/trunk@323 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-02-08 17:32:41 +00:00
parent 4f6b9e2082
commit 5ce761ead5
1 changed files with 1 additions and 10 deletions
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lib/CPUs/MIPS/src/core/mips_reg.vhd
+1 -10
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@@ -51,16 +51,7 @@ architecture Behavioral of reg_dual is
constant depth : integer := 2**addr_width; constant depth : integer := 2**addr_width;
type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0); type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0);
function mem_clear(depth : natural) return mem_t is signal reg_mem : mem_t;
variable result : mem_t;
begin
for i in 0 to depth-1 loop
result(i) := (others => '0');
end loop;
return result;
end mem_clear;
signal reg_mem : mem_t := mem_clear(depth);
begin begin