- removed RAM-init during synthesizing

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git-svn-id: http://moon:8086/svn/vhdl/trunk@323 cc03376c-175c-47c8-b038-4cd826a8556b

lib/CPUs/MIPS/src/core/mips_reg.vhd

@@ -51,16 +51,7 @@ architecture Behavioral of reg_dual is
 	constant depth : integer := 2**addr_width;
 	type mem_t is array (0 to depth-1) of unsigned (data_width-1 downto 0);
 
-	function mem_clear(depth : natural) return mem_t is
-	variable result : mem_t;
-	begin
-		for i in 0 to depth-1 loop
-			result(i) := (others => '0');
-		end loop;
-		return result;
-	end mem_clear;
-	
-	signal reg_mem : mem_t := mem_clear(depth);
+	signal reg_mem : mem_t;
 	
 begin