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git-svn-id: http://moon:8086/svn/vhdl/trunk@1422 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-21 11:25:09 +00:00
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+#
+#     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
+#     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
+#     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
+#     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
+#     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
+#     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
+#     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
+#     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
+#     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
+#     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
+#     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
+#     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+#     FOR A PARTICULAR PURPOSE.
+#     
+#     (c) Copyright 2005 Xilinx, Inc.
+#     All rights reserved.
+#
+
+# Bus clock nets
+NET sys_clk_in TNM_NET = "sys_clk_in";
+TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %;
+
+NET sys_clk_in LOC = AE14;
+NET sys_clk_in IOSTANDARD = LVCMOS33;
+NET sys_rst_n_in LOC = D6;
+NET sys_rst_n_in PULLUP;
+NET sys_rst_n_in TIG;
+
+# GPLED 0-3
+NET led<0>  LOC = G5;  #GPLED0
+NET led<1>  LOC = G6;  #GPLED1
+NET led<2>  LOC = A11; #GPLED2
+NET led<3>  LOC = A12; #GPLED3
+
+NET "led<*>" SLEW = SLOW;
+NET "led<*>" DRIVE = 2;
+
+NET sys_rx LOC = W2;
+NET sys_rx IOSTANDARD = LVCMOS33;
+NET sys_rx TIG;
+NET sys_tx LOC = W1;
+NET sys_tx IOSTANDARD = LVCMOS33;
+NET sys_tx TIG;
+
+
+# Dip Switches 1-8
+#NET sys_test_in<0> LOC = U24; # DIP SW 8
+#NET sys_test_in<1> LOC = U25; # DIP SW 7
+#NET sys_test_in<2> LOC = V23; # DIP SW 6
+#NET sys_test_in<3> LOC = U23; # DIP SW 5
+#NET sys_test_in<4> LOC = U26; # DIP SW 4
+#NET sys_test_in<5> LOC = T26; # DIP SW 3
+#NET sys_test_in<6> LOC = R19; # DIP SW 2
+#NET sys_test_in<7> LOC = R20; # DIP SW 1
+#NET sys_test_in<0> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<1> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<2> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<3> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<4> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<5> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<6> IOSTANDARD = LVCMOS33;
+#NET sys_test_in<7> IOSTANDARD = LVCMOS33;
+
+#NET "sys_test_in<*>" PULLDOWN;
+#NET "sys_test_in<*>" TIG;
+#NET "sys_test_in<*>" SLEW = SLOW;
+#NET "sys_test_in<*>" DRIVE = 2;
+
+#------------------------------------------------------------------------------
+# IO Pad Location Constraints / Properties for PS/2 Ports
+#------------------------------------------------------------------------------
+
+#Keyboard
+#NET ps2_keyb_clk  LOC = D2;
+#NET ps2_keyb_clk  SLEW = SLOW;
+#NET ps2_keyb_clk  DRIVE = 2;
+#NET ps2_keyb_clk  TIG;
+#NET ps2_keyb_data LOC = G9;
+#NET ps2_keyb_data SLEW = SLOW;
+#NET ps2_keyb_data DRIVE = 2;
+#NET ps2_keyb_data TIG;
+
+#Mouse
+NET ps2_mouse_clk  LOC = B14;
+NET ps2_mouse_clk  SLEW = SLOW;
+NET ps2_mouse_clk  DRIVE = 2;
+NET ps2_mouse_clk  TIG;
+NET ps2_mouse_data LOC = C14;
+NET ps2_mouse_data SLEW = SLOW;
+NET ps2_mouse_data DRIVE = 2;
+NET ps2_mouse_data TIG;