- fixed mips_sys_sim.vhd due to SDRAM changes

git-svn-id: http://moon:8086/svn/vhdl/trunk@1199 cc03376c-175c-47c8-b038-4cd826a8556b
2015-05-24 09:58:56 +00:00
parent 3f4cbf0377
commit 4cd72abd34
3 changed files with 9 additions and 32 deletions
@@ -840,20 +840,20 @@ inst_clocken_vga : entity work.clockgen
 		clk_out				=> vga_clk
 	);

-inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
+inst_sdram_ctrl_wb64 : entity work.ctrl_ddr_wb64
 	GENERIC MAP
 	(
-		BL				=> BURST_LEN,
-		f_sysclk		=> sys_freq_in,
-		f_sdrclk		=> sys_freq_in,
-		fifo_depth		=> 5
+		BURST_LEN			=> BURST_LEN,
+		F_SYSCLK			=> sys_freq_in,
+		F_SDRCLK			=> sys_freq_in,
+		FIFO_DEPTH			=> 5
 	)
 	PORT MAP
 	(
 		RST_I				=> RST_O,
 		CLK_I				=> CLK_O,

-		SDRAM_CLK_I			=> sys_clk_in,
+		SDRAM_CLK_I			=> CLK_O,
 		SDRAM_CLK_FB_I		=> sys_sdr_clk_fb,
 		
 		CYC_I				=> CYC_I_sdram,