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- fixed mips_sys_sim.vhd due to SDRAM changes

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1199 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2015-05-24 09:58:56 +00:00
parent 3f4cbf0377
commit 4cd72abd34
3 changed files with 9 additions and 32 deletions
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projects/mips_sys/sim/tb_mips_sys.fdo
+2 -1
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@@ -90,7 +90,8 @@ vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb64.vhd"
vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/ctrl_ddr_wb64.vhd"
# AC-97
vcom -explicit -93 "../../../lib/misc/singleshot.vhd"
projects/mips_sys/sim/tb_mips_sys.wdo
+1 -25
View File
@@ -62,24 +62,6 @@ add wave -noupdate -format Logic /tb_mips_sys/uut/cyc_i_ac97
add wave -noupdate -format Logic /tb_mips_sys/uut/cyc_i_ps2
add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
add wave -noupdate -divider {Clock Gen}
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/rst_in
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/clk_in
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sys_clk_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/vga_clk_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr0_clk_fb_in
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr0_clk0_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr0_clk270_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr1_clk0_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr1_clk270_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sys_rst_out
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_clockgen/reset_cnt
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_clockgen/reset_pipe0
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_clockgen/reset_pipe1
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/vga_fx_lock
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sys_fx_lock
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr0_lock
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/sdr1_lock
add wave -noupdate -divider Arbiter
add wave -noupdate -format Literal /tb_mips_sys/uut/arb_idx
add wave -noupdate -format Literal /tb_mips_sys/uut/arb_req
@@ -289,16 +271,12 @@ add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_run
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/ex_stage
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/mem_stage
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/wb_stage
add wave -noupdate -divider {CPU DMEM}
add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
@@ -323,7 +301,6 @@ add wave -noupdate -format Literal /tb_mips_sys/uut/sys_sdr_dqs_q
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_sdr_ras_qn
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_sdr_we_qn
add wave -noupdate -divider I-Cache
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_icache/rst_i
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_icache/clk_i
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_icache/ack_i
@@ -375,7 +352,6 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_icache/cpu_cache_index
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_icache/cpu_word_index
add wave -noupdate -divider D-Cache
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_dcache/rst_i
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_dcache/clk_i
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_biu/inst_dcache/ack_i
@@ -454,4 +430,4 @@ configure wave -gridperiod 100
configure wave -griddelta 40
configure wave -timeline 1
update
WaveRestoreZoom {15591849308 ps} {15592330693 ps}
WaveRestoreZoom {2697887685 ps} {2698369070 ps}
projects/mips_sys/src/mips_sys_sim.vhd
+6 -6
View File
@@ -840,20 +840,20 @@ inst_clocken_vga : entity work.clockgen
clk_out => vga_clk
);
inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
inst_sdram_ctrl_wb64 : entity work.ctrl_ddr_wb64
GENERIC MAP
(
BL => BURST_LEN,
f_sysclk => sys_freq_in,
f_sdrclk => sys_freq_in,
fifo_depth => 5
BURST_LEN => BURST_LEN,
F_SYSCLK => sys_freq_in,
F_SDRCLK => sys_freq_in,
FIFO_DEPTH => 5
)
PORT MAP
(
RST_I => RST_O,
CLK_I => CLK_O,
SDRAM_CLK_I => sys_clk_in,
SDRAM_CLK_I => CLK_O,
SDRAM_CLK_FB_I => sys_sdr_clk_fb,
CYC_I => CYC_I_sdram,