jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- SR(7 .. 0) are not writable in user-mode

Browse Source 
- registered 'ctrl_out.int' for better timing
Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@458 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-04-27 08:23:08 +00:00
parent 20dc046c75
commit 4c309f1eef
1 changed files with 8 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/src/core/mips_cop.vhd
+8 -3
View File
@@ -126,7 +126,6 @@ begin
cop_pipe_ID.RFE <= cop_pipe_ID.cs when (cop_pipe_ID.CO = '1' and cop_pipe_ID.func = "010000") else '0'; cop_pipe_ID.RFE <= cop_pipe_ID.cs when (cop_pipe_ID.CO = '1' and cop_pipe_ID.func = "010000") else '0';
ctrl_out.EB <= EB_reg xor (status(25) and status(1)); ctrl_out.EB <= EB_reg xor (status(25) and status(1));
ctrl_out.user_mode <= status(1); ctrl_out.user_mode <= status(1);
ctrl_out.int <= eval_int(ip) and status(0);
cop_pipe_ID.reg_ptr <= cop_pipe_ID.rd when cop_pipe_ID.opc = "010000" else cop_pipe_ID.rt; cop_pipe_ID.reg_ptr <= cop_pipe_ID.rd when cop_pipe_ID.opc = "010000" else cop_pipe_ID.rt;
@@ -328,6 +327,7 @@ cop_cache_op:
cop_ip_reg_write: cop_ip_reg_write:
process(clk) process(clk)
variable ip_v : unsigned(7 downto 0);
begin begin
if rising_edge(clk) then if rising_edge(clk) then
if rst = '1' then if rst = '1' then
@@ -337,7 +337,9 @@ cop_ip_reg_write:
sw_int <= din(9 downto 8); sw_int <= din(9 downto 8);
end if; end if;
end if; end if;
ip <= (int & sw_int) and im; ip_v := (int & sw_int) and im;
ip <= ip_v;
ctrl_out.int <= eval_int(ip_v) and status(0);
end if; end if;
end process; end process;
@@ -465,7 +467,10 @@ cop_status_reg_write:
status(3 downto 2) <= status(5 downto 4); status(3 downto 2) <= status(5 downto 4);
elsif ctrl_in.sdu.WB_nop = '0' then elsif ctrl_in.sdu.WB_nop = '0' then
if stat_reg_we = '1' then if stat_reg_we = '1' then
status <= din; if status(1) = '0' then
status(7 downto 0) <= din(7 downto 0);
end if;
status(31 downto 8) <= din(31 downto 8);
end if; end if;
end if; end if;
end if; end if;