jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- fixed paths after refactoring

Browse Source 
git-svn-id: http://moon:8086/svn/vhdl/trunk@1532 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-24 18:57:18 +00:00
parent 599726a7b2
commit 4943c43e32
6 changed files with 31 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/ghdl/tb_mips_top.make
+4 -4
View File
@@ -16,18 +16,18 @@ SRCS += ../../../uart/src/sim/uart.vhd
SRCS += ../../../uart/src/uart_wb.vhd SRCS += ../../../uart/src/uart_wb.vhd
# GPIO # GPIO
SRCS += ../../../misc/gpio_wb.vhd SRCS += ../../../JBUS/gpio/src/gpio_wb.vhd
# Async port # Async port
SRCS += ../../../misc/async_types.vhd SRCS += ../../../JBUS/async_port/src/async_types.vhd
SRCS += ../../../misc/async_port_wb.vhd SRCS += ../../../JBUS/async_port/src/async_port_wb.vhd
SRCS += ../src/async_defs.vhd SRCS += ../src/async_defs.vhd
# ROM # ROM
#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd #SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd #SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
SRCS += ../src/bootloader_flash.ROM.vhd SRCS += ../src/bootloader_flash.ROM.vhd
SRCS += ../../../misc/rom_wb.vhd SRCS += ../../../JBUS/memory/src/rom_wb.vhd
# MIPS # MIPS
SRCS += $(MIPS_CORE_SRCS) SRCS += $(MIPS_CORE_SRCS)
lib/JBUS/busmaster/ghdl/tb_busmaster_async.make
+6 -6
View File
@@ -1,14 +1,14 @@
include ../../../lib/FIFO/ghdl/fifo_async.inc include ../../../../lib/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../.. ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(FIFO_ASYNC_SRCS) SRCS += $(FIFO_ASYNC_SRCS)
SRCS += $(MOD_PATH)/src/busmaster/busmaster_types.vhd SRCS += $(MOD_PATH)/src/busmaster_types.vhd
SRCS += $(MOD_PATH)/src/busmaster/busmaster_async.vhd SRCS += $(MOD_PATH)/src/busmaster_async.vhd
SRCS += $(MOD_PATH)/src/busmaster/tb_busmaster_async.vhd SRCS += $(MOD_PATH)/src/tb_busmaster_async.vhd
# Compile # Compile
TARGET := tb_busmaster_async TARGET := tb_busmaster_async
lib/JBUS/busmaster/ghdl/tb_busmaster_sync.make
+6 -6
View File
@@ -1,14 +1,14 @@
include ../../../lib/FIFO/ghdl/fifo_sync.inc include ../../../../lib/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../.. ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(FIFO_SYNC_SRCS) SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(MOD_PATH)/src/busmaster/busmaster_types.vhd SRCS += $(MOD_PATH)/src/busmaster_types.vhd
SRCS += $(MOD_PATH)/src/busmaster/busmaster_sync.vhd SRCS += $(MOD_PATH)/src/busmaster_sync.vhd
SRCS += $(MOD_PATH)/src/busmaster/tb_busmaster_sync.vhd SRCS += $(MOD_PATH)/src/tb_busmaster_sync.vhd
# Compile # Compile
TARGET := tb_busmaster_sync TARGET := tb_busmaster_sync
lib/JBUS/dmac/ghdl/tb_dmac_sync.make
+6 -6
View File
@@ -1,15 +1,15 @@
include ../../../lib/FIFO/ghdl/fifo_sync.inc include ../../../../lib/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../.. ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS MOD_PATH := $(LIB_PATH)/JBUS
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(FIFO_SYNC_SRCS) SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(MOD_PATH)/src/busmaster/busmaster_types.vhd SRCS += $(MOD_PATH)/busmaster/src/busmaster_types.vhd
SRCS += $(MOD_PATH)/src/busmaster/busmaster_sync.vhd SRCS += $(MOD_PATH)/busmaster/src/busmaster_sync.vhd
SRCS += $(MOD_PATH)/src/dmac/dmac.vhd SRCS += $(MOD_PATH)/dmac/src/dmac.vhd
SRCS += $(MOD_PATH)/src/dmac/tb_dmac.vhd SRCS += $(MOD_PATH)/dmac/src/tb_dmac.vhd
# Compile # Compile
TARGET := tb_dmac_sync TARGET := tb_dmac_sync
lib/JBUS/memory/ghdl/tb_ram_wb.make
+4 -4
View File
@@ -1,11 +1,11 @@
ROOT_PATH := ../../.. ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/rams/sim/dpram_1w1r1c_ra.vhd SRCS += $(LIB_PATH)/rams/sim/dpram_1w1r1c_ra.vhd
SRCS += $(MOD_PATH)/src/memory/ram_wb.vhd SRCS += $(MOD_PATH)/src/ram_wb.vhd
SRCS += $(MOD_PATH)/src/memory/tb_ram_wb.vhd SRCS += $(MOD_PATH)/src/tb_ram_wb.vhd
# Compile # Compile
TARGET := tb_ram_wb TARGET := tb_ram_wb
lib/JBUS/memory/ghdl/tb_rom_wb.make
+5 -5
View File
@@ -1,10 +1,10 @@
ROOT_PATH := ../../.. ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(MOD_PATH)/src/memory/rom_sim.vhd SRCS += $(MOD_PATH)/src/rom_sim.vhd
SRCS += $(MOD_PATH)/src/memory/rom_wb.vhd SRCS += $(MOD_PATH)/src/rom_wb.vhd
SRCS += $(MOD_PATH)/src/memory/tb_rom_wb.vhd SRCS += $(MOD_PATH)/src/tb_rom_wb.vhd
# Compile # Compile
TARGET := tb_rom_wb TARGET := tb_rom_wb