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- fixed paths after refactoring

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1532 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2021-03-24 18:57:18 +00:00
parent 599726a7b2
commit 4943c43e32
6 changed files with 31 additions and 31 deletions
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lib/CPUs/MIPS/ghdl/tb_mips_top.make
+4 -4
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@@ -16,18 +16,18 @@ SRCS += ../../../uart/src/sim/uart.vhd
SRCS += ../../../uart/src/uart_wb.vhd
# GPIO
SRCS += ../../../misc/gpio_wb.vhd
SRCS += ../../../JBUS/gpio/src/gpio_wb.vhd
# Async port
SRCS += ../../../misc/async_types.vhd
SRCS += ../../../misc/async_port_wb.vhd
SRCS += ../../../JBUS/async_port/src/async_types.vhd
SRCS += ../../../JBUS/async_port/src/async_port_wb.vhd
SRCS += ../src/async_defs.vhd
# ROM
#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
SRCS += ../src/bootloader_flash.ROM.vhd
SRCS += ../../../misc/rom_wb.vhd
SRCS += ../../../JBUS/memory/src/rom_wb.vhd
# MIPS
SRCS += $(MIPS_CORE_SRCS)