Minor changes

git-svn-id: http://moon:8086/svn/vhdl/trunk@26 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2008-10-07 17:20:44 +00:00
parent f2ebee9703
commit 3ecd76f185
3 changed files with 132 additions and 111 deletions
@@ -66,10 +66,12 @@ architecture struct of tb_sdram_ctrl_frontend_wb is
signal WE_O : std_logic := '0';
signal SEL_O : unsigned(3 downto 0) := (others => '1');
signal ACK_I : std_logic;
signal RDY_I : std_logic;
signal MRDY_O : std_logic := '1';
signal SRDY_I : std_logic;
signal ADDR_O : unsigned(31 downto 0) := (others => '-');
signal DAT_I : unsigned(31 downto 0);
signal DAT_O : unsigned(31 downto 0) := (others => '-');
signal dout_rst : std_logic := '0';
signal dout_reg : unsigned(31 downto 0);
signal dout_cnt : natural range 0 to 255;
@@ -106,7 +108,7 @@ inst_clockgen : entity work.clockgen
(
BL => BURST_LEN,
f_sysclk => 100E6,
fifo_depth => 2
fifo_depth => 3
)
PORT MAP
(
@@ -120,7 +122,8 @@ inst_clockgen : entity work.clockgen
SEL_I => SEL_O,
WE_I => WE_O,
ACK_O => ACK_I,
RDY_O => RDY_I,
SRDY_O => SRDY_I,
MRDY_I => MRDY_O,
ADDR_I => ADDR_O,
DAT_I => DAT_O,
DAT_O => DAT_I,
@@ -187,7 +190,7 @@ STIMULUS: process
wait for 3*CLK_PERIOD;
rst <= '0';
wait until RST_O = '0';
-- 8 single cycles
CYC_O <= '1';
@@ -195,119 +198,120 @@ STIMULUS: process
WE_O <= '1';
DAT_O <= X"1234_0000";
ADDR_O <= X"0000_0000";
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
DAT_O <= DAT_O + 1;
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
CYC_O <= '0';
@@ -320,21 +324,21 @@ STIMULUS: process
STB_O <= '1';
WE_O <= '0';
ADDR_O <= X"0000_0000";
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and dout_cnt = 7;
@@ -349,8 +353,9 @@ STIMULUS: process
SEL_O <= "0011";
ADDR_O <= X"0000_0080";
DAT_O <= X"DEADBEEF";
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
CYC_O <= '0';
wait for 3*CLK_PERIOD;
@@ -360,7 +365,7 @@ STIMULUS: process
STB_O <= '1';
WE_O <= '0';
ADDR_O <= X"0000_0080";
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and ACK_I = '1';
CYC_O <= '0';
@@ -374,115 +379,120 @@ STIMULUS: process
STB_O <= '1';
WE_O <= '0';
ADDR_O <= X"0000_0000";
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
MRDY_O <= '0';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '1';
MRDY_O <= '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
ADDR_O <= ADDR_O + 4;
wait until rising_edge(CLK_O) and RDY_I = '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
wait until rising_edge(CLK_O) and dout_cnt = 54;