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Initial import

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git-svn-id: http://moon:8086/svn/vhdl/trunk@2 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2008-08-23 07:19:47 +00:00
parent 6badec2df7
commit 335cc4e9d2
138 changed files with 40978 additions and 0 deletions
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lib/CPUs/JCpu/sim/tb_cpu_reti_issue.fdo
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## NOTE: Do not edit this file.
##
vlib work
vcom -explicit -93 "../../../PCK_FIO-1.16/PCK_FIO.vhd"
vcom -explicit -93 "../src/core/cpu_pkg.vhd"
vcom -explicit -93 "../src/core/stack_ctrl.vhd"
vcom -explicit -93 "../src/core/reg_dual.vhd"
vcom -explicit -93 "../src/core/chipram.vhd"
vcom -explicit -93 "../src/core/chipreg.vhd"
vcom -explicit -93 "../src/core/pc.vhd"
vcom -explicit -93 "../src/core/dpath_ctrl.vhd"
vcom -explicit -93 "../src/core/int_ctrl.vhd"
vcom -explicit -93 "../src/core/alu.vhd"
vcom -explicit -93 "../src/core/cpu.vhd"
vcom -explicit -93 "../src/irom_reti_issue.vhdl"
vcom -explicit -93 "../src/core/tb_cpu.vhd"
vsim -t 1ps -lib work tb_cpu
do {tb_cpu_reti_issue.wdo}
view wave
view structure
view signals
run 50us