jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- added port 'eb' for Endian-big selection

Browse Source 
Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@433 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-04-15 13:23:30 +00:00
parent b8890b0132
commit 2fb198d941
5 changed files with 29 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/src/tb_mips_top.vhd
+5 -3
View File
@@ -38,14 +38,15 @@ END tb_mips_top;
ARCHITECTURE behavior OF tb_mips_top IS
constant CLK_PERIOD : time := 10 ns;
constant SRAM_ADDR_WIDTH : integer := 15; -- bits
constant FLASH_ADDR_WIDTH : integer := 15; -- bits
constant SRAM_ADDR_WIDTH : integer := 17; -- bits
constant FLASH_ADDR_WIDTH : integer := 17; -- bits
signal debug : unsigned(1 downto 0);
-- Master
signal rst : STD_LOGIC := '1';
signal clk : STD_LOGIC := '0';
signal eb : STD_LOGIC := '0';
signal ACK_I : STD_LOGIC := '0';
signal SRDY_I : STD_LOGIC := '0';
signal ADDR_O : unsigned(31 downto 0);
@@ -200,6 +201,7 @@ uut: entity work.mips_top
PORT MAP
(
debug => debug,
eb => eb,
RST_I => rst,
CLK_I => clk,
ACK_I => ACK_I,
@@ -385,7 +387,7 @@ SRAM_WRITE:
FLASH_READ:
process(rst, flash_cs_n, flash_oe_n, flash_a)
type file_t is file of integer;
file load_flash : file_t open read_mode is "test_timer.flash.bin";
file load_flash : file_t open read_mode is "test_endianess.flash.bin";
variable instr : integer;
variable index : natural;
variable temp : signed(31 downto 0);