- added models

git-svn-id: http://moon:8086/svn/vhdl/trunk@1290 cc03376c-175c-47c8-b038-4cd826a8556b
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To operate the test bench for the Micron SDRAM VHDL model, follow the directions
given below:
1. Be sure all supporting files for the SDRAM are compiled into your library:
util1164.vhd
stdlogar.vhd
io_utils.vhd
mti_pkg.vhd
2. Next, compile the mt48lc32m4a2.vhd file and the test.vhd file.
3. Simulate the "tb" architecture. This is the testbench for the 128Mb SDRAM.