- fixed pipelined access

git-svn-id: http://moon:8086/svn/vhdl/trunk@1301 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-06-13 11:37:26 +00:00
parent bdf60c1304
commit 2b459949bb
+5 -2
View File
@@ -65,6 +65,7 @@ ARCHITECTURE rtl OF spi_flash_wb IS
signal state : state_t;
signal state_next : state_t;
signal SRDY_mem : std_logic;
signal ACK_mem : std_logic;
signal ACK_reg : std_logic;
signal DAT_mem : unsigned(31 downto 0);
@@ -78,6 +79,7 @@ begin
INT_O <= '0';
ACK_O <= ACK_mem or ACK_reg;
DAT_O <= DAT_reg when ACK_reg = '1' else DAT_mem;
SRDY_O <= SRDY_mem;
tag_match <= tag_valid when ADDR_I(tag_reg'range) = tag_reg else '0';
@@ -137,7 +139,7 @@ word_addr_register:
word_addr_register:
process(CLK_I)
begin
if rising_edge(CLK_I) then
if rising_edge(CLK_I) then
if (CYC_I and STB_I and SRDY_mem and not register_access and not WE_I) = '1' then
word_addr_reg <= ADDR_I(CACHE_ADDR_BITS-1 downto 2);
end if;
@@ -192,7 +194,7 @@ proc_fsm:
proc_fsm:
process(state, CYC_I, STB_I, WE_I, tag_match, mst_cmd_rdy, mst_din_rdy, mst_status, register_access)
begin
state_next <= state;
state_next <= state;
SRDY_mem <= '0';
mst_cmd_vld <= '0';
mst_din_vld <= '0';
@@ -202,6 +204,7 @@ begin
when reset =>
state_next <= idle;
when idle =>
SRDY_mem <= CYC_I;
if (CYC_I and STB_I and not WE_I and not register_access) = '1' then
if tag_match = '0' then