- use now non-debug-versions (NCO, MIX) for TB
git-svn-id: http://moon:8086/svn/vhdl/trunk@155 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -8,12 +8,12 @@ vcom -explicit -93 "../../cordic/src/cordic_pipe_pre.vhd"
|
|||||||
vcom -explicit -93 "../../cordic/src/cordic_pipe_post.vhd"
|
vcom -explicit -93 "../../cordic/src/cordic_pipe_post.vhd"
|
||||||
vcom -explicit -93 "../../cordic/src/cordic_pipe_top.vhd"
|
vcom -explicit -93 "../../cordic/src/cordic_pipe_top.vhd"
|
||||||
vcom -explicit -93 "../src/nco_pkg.vhd"
|
vcom -explicit -93 "../src/nco_pkg.vhd"
|
||||||
vcom -explicit -93 "../src/nco_cordic_dbg.vhd"
|
vcom -explicit -93 "../src/nco_cordic.vhd"
|
||||||
vcom -explicit -93 "../src/mix_cordic_dbg.vhd"
|
vcom -explicit -93 "../src/mix_cordic.vhd"
|
||||||
vcom -explicit -93 "../src/tb_mix_cordic.vhd"
|
vcom -explicit -93 "../src/tb_mix_cordic.vhd"
|
||||||
vsim -t 1ps -lib work tb_mix
|
vsim -t 1ps -lib work tb_mix
|
||||||
do {tb_mix_cordic.wdo}
|
do {tb_mix_cordic.wdo}
|
||||||
view wave
|
view wave
|
||||||
view structure
|
view structure
|
||||||
view signals
|
view signals
|
||||||
run 250us
|
run 400us
|
||||||
|
|||||||
@@ -57,8 +57,7 @@ ARCHITECTURE behavior OF tb_mix IS
|
|||||||
wave_in_q : in sfixed;
|
wave_in_q : in sfixed;
|
||||||
wave_out_i : out sfixed;
|
wave_out_i : out sfixed;
|
||||||
wave_out_q : out sfixed;
|
wave_out_q : out sfixed;
|
||||||
out_valid : out std_logic;
|
out_valid : out std_logic
|
||||||
debug_out : out debug_mix_out_t
|
|
||||||
);
|
);
|
||||||
END COMPONENT;
|
END COMPONENT;
|
||||||
|
|
||||||
@@ -82,16 +81,15 @@ ARCHITECTURE behavior OF tb_mix IS
|
|||||||
phase_out : out unsigned(nbits_phase-1 downto 0);
|
phase_out : out unsigned(nbits_phase-1 downto 0);
|
||||||
wave_out_i : out sfixed;
|
wave_out_i : out sfixed;
|
||||||
wave_out_q : out sfixed;
|
wave_out_q : out sfixed;
|
||||||
out_valid : out std_logic;
|
out_valid : out std_logic
|
||||||
debug_out : out debug_out_t
|
|
||||||
);
|
);
|
||||||
END COMPONENT;
|
END COMPONENT;
|
||||||
|
|
||||||
--Constants
|
--Constants
|
||||||
constant f : REAL := 9.125E6;
|
|
||||||
constant frf : REAL := 10.875E6;
|
|
||||||
constant df : REAL := 10.0E3;
|
|
||||||
constant fa : REAL := 100.0E6;
|
constant fa : REAL := 100.0E6;
|
||||||
|
constant frf : REAL := 3.333E5;
|
||||||
|
constant flo : REAL := 3.333E5;
|
||||||
|
constant df : REAL := 10.0E3;
|
||||||
constant PERIOD : time := 10 ns;
|
constant PERIOD : time := 10 ns;
|
||||||
constant num_steps : integer := 1000000;
|
constant num_steps : integer := 1000000;
|
||||||
|
|
||||||
@@ -99,7 +97,7 @@ ARCHITECTURE behavior OF tb_mix IS
|
|||||||
constant nbits_wave_out_frac : integer := nbits_wave_out-2;
|
constant nbits_wave_out_frac : integer := nbits_wave_out-2;
|
||||||
|
|
||||||
SIGNAL rfgen_freq_word : integer := integer(frf/fa*2.0**nbits_phase);
|
SIGNAL rfgen_freq_word : integer := integer(frf/fa*2.0**nbits_phase);
|
||||||
SIGNAL freq_word : integer := integer(f/fa*2.0**nbits_phase);
|
SIGNAL freq_word : integer := integer(flo/fa*2.0**nbits_phase);
|
||||||
SIGNAL dfreq_word : integer := integer(df/fa*2.0**nbits_phase);
|
SIGNAL dfreq_word : integer := integer(df/fa*2.0**nbits_phase);
|
||||||
|
|
||||||
--Inputs
|
--Inputs
|
||||||
@@ -117,8 +115,7 @@ ARCHITECTURE behavior OF tb_mix IS
|
|||||||
SIGNAL wave_in_q : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
SIGNAL wave_in_q : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
||||||
SIGNAL wave_out_i : sfixed(shi(nbits_wave_out, nbits_wave_out_frac) downto slo(nbits_wave_out, nbits_wave_out_frac));
|
SIGNAL wave_out_i : sfixed(shi(nbits_wave_out, nbits_wave_out_frac) downto slo(nbits_wave_out, nbits_wave_out_frac));
|
||||||
SIGNAL wave_out_q : sfixed(shi(nbits_wave_out, nbits_wave_out_frac) downto slo(nbits_wave_out, nbits_wave_out_frac));
|
SIGNAL wave_out_q : sfixed(shi(nbits_wave_out, nbits_wave_out_frac) downto slo(nbits_wave_out, nbits_wave_out_frac));
|
||||||
SIGNAL out_valid : std_logic;
|
SIGNAL mix_out_valid : std_logic;
|
||||||
SIGNAL mix_debug_out : debug_mix_out_t;
|
|
||||||
|
|
||||||
SIGNAL rfgen_pacc_clr : std_logic := '0';
|
SIGNAL rfgen_pacc_clr : std_logic := '0';
|
||||||
SIGNAL rfgen_pacc_inc : std_logic := '0';
|
SIGNAL rfgen_pacc_inc : std_logic := '0';
|
||||||
@@ -128,10 +125,9 @@ ARCHITECTURE behavior OF tb_mix IS
|
|||||||
SIGNAL rfgen_phase_in : unsigned(nbits_phase-1 downto 0);
|
SIGNAL rfgen_phase_in : unsigned(nbits_phase-1 downto 0);
|
||||||
|
|
||||||
--Outputs
|
--Outputs
|
||||||
SIGNAL rfgen_wave_out_i : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
SIGNAL rfgen_out_i : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
||||||
SIGNAL rfgen_wave_out_q : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
SIGNAL rfgen_out_q : sfixed(shi(nbits_wave_in, nbits_wave_in_frac) downto slo(nbits_wave_in, nbits_wave_in_frac));
|
||||||
SIGNAL rfgen_out_valid : std_logic;
|
SIGNAL rfgen_out_valid : std_logic;
|
||||||
SIGNAL rfgen_debug_out : debug_out_t;
|
|
||||||
SIGNAL fileout_enable : std_logic := '0';
|
SIGNAL fileout_enable : std_logic := '0';
|
||||||
|
|
||||||
BEGIN
|
BEGIN
|
||||||
@@ -160,8 +156,7 @@ BEGIN
|
|||||||
wave_in_q => wave_in_q,
|
wave_in_q => wave_in_q,
|
||||||
wave_out_i => wave_out_i,
|
wave_out_i => wave_out_i,
|
||||||
wave_out_q => wave_out_q,
|
wave_out_q => wave_out_q,
|
||||||
out_valid => out_valid,
|
out_valid => mix_out_valid
|
||||||
debug_out => mix_debug_out
|
|
||||||
);
|
);
|
||||||
|
|
||||||
rfgen1: nco
|
rfgen1: nco
|
||||||
@@ -182,10 +177,9 @@ BEGIN
|
|||||||
phase_in => rfgen_phase_in,
|
phase_in => rfgen_phase_in,
|
||||||
phase_load => rfgen_phase_load,
|
phase_load => rfgen_phase_load,
|
||||||
phase_out => open,
|
phase_out => open,
|
||||||
wave_out_i => rfgen_wave_out_i,
|
wave_out_i => rfgen_out_i,
|
||||||
wave_out_q => rfgen_wave_out_q,
|
wave_out_q => rfgen_out_q,
|
||||||
out_valid => rfgen_out_valid,
|
out_valid => rfgen_out_valid
|
||||||
debug_out => rfgen_debug_out
|
|
||||||
);
|
);
|
||||||
|
|
||||||
tb_clk : PROCESS
|
tb_clk : PROCESS
|
||||||
@@ -194,8 +188,8 @@ BEGIN
|
|||||||
wait for PERIOD/2;
|
wait for PERIOD/2;
|
||||||
END PROCESS;
|
END PROCESS;
|
||||||
|
|
||||||
-- wave_in_i <= resize(1.0*rfgen_wave_out_i, wave_in_i, false, true);
|
-- wave_in_i <= resize(1.0*rfgen_out_i, wave_in_i, false, true);
|
||||||
wave_in_i <= rfgen_wave_out_i;
|
wave_in_i <= rfgen_out_i;
|
||||||
wave_in_q <= to_sfixed(0.0, wave_in_q);
|
wave_in_q <= to_sfixed(0.0, wave_in_q);
|
||||||
|
|
||||||
tb : PROCESS
|
tb : PROCESS
|
||||||
@@ -208,7 +202,7 @@ BEGIN
|
|||||||
wait for 4*PERIOD;
|
wait for 4*PERIOD;
|
||||||
srst <= '0';
|
srst <= '0';
|
||||||
|
|
||||||
fprint(RESULT_FREQ, L,"%s\n", REAL'image(f));
|
fprint(RESULT_FREQ, L,"%s\n", REAL'image(flo));
|
||||||
|
|
||||||
wait for 2*PERIOD;
|
wait for 2*PERIOD;
|
||||||
-------------------------------------------
|
-------------------------------------------
|
||||||
@@ -273,7 +267,7 @@ BEGIN
|
|||||||
wait for 20*PERIOD;
|
wait for 20*PERIOD;
|
||||||
fileout_enable <= '1';
|
fileout_enable <= '1';
|
||||||
|
|
||||||
wait for 20000*PERIOD;
|
wait for 200000*PERIOD;
|
||||||
fileout_enable <= '0';
|
fileout_enable <= '0';
|
||||||
|
|
||||||
-------------------------------------------
|
-------------------------------------------
|
||||||
@@ -359,7 +353,7 @@ BEGIN
|
|||||||
wait;
|
wait;
|
||||||
END PROCESS;
|
END PROCESS;
|
||||||
|
|
||||||
tb_fo : PROCESS(clk, fileout_enable, out_valid)
|
tb_fo : PROCESS(clk, fileout_enable, mix_out_valid)
|
||||||
file RESULT_Ii: text open write_mode is "i_in.txt";
|
file RESULT_Ii: text open write_mode is "i_in.txt";
|
||||||
file RESULT_Qi: text open write_mode is "q_in.txt";
|
file RESULT_Qi: text open write_mode is "q_in.txt";
|
||||||
file RESULT_Io: text open write_mode is "i_out.txt";
|
file RESULT_Io: text open write_mode is "i_out.txt";
|
||||||
@@ -367,11 +361,15 @@ BEGIN
|
|||||||
variable L: line;
|
variable L: line;
|
||||||
|
|
||||||
BEGIN
|
BEGIN
|
||||||
if rising_edge(clk) and fileout_enable = '1' and out_valid = '1' then
|
if rising_edge(clk) and fileout_enable = '1' then
|
||||||
fprint(RESULT_Ii, L,"%s\n", REAL'image(rfgen_debug_out.i_ud));
|
if rfgen_out_valid = '1' then
|
||||||
fprint(RESULT_Qi, L,"%s\n", REAL'image(rfgen_debug_out.q_ud));
|
fprint(RESULT_Ii, L,"%s\n", REAL'image(to_real(rfgen_out_i)));
|
||||||
fprint(RESULT_Io, L,"%s\n", REAL'image(mix_debug_out.i_out));
|
fprint(RESULT_Qi, L,"%s\n", REAL'image(to_real(rfgen_out_q)));
|
||||||
fprint(RESULT_Qo, L,"%s\n", REAL'image(mix_debug_out.q_out));
|
end if;
|
||||||
|
if mix_out_valid = '1' then
|
||||||
|
fprint(RESULT_Io, L,"%s\n", REAL'image(to_real(wave_out_i)));
|
||||||
|
fprint(RESULT_Qo, L,"%s\n", REAL'image(to_real(wave_out_q)));
|
||||||
|
end if;
|
||||||
end if;
|
end if;
|
||||||
|
|
||||||
END PROCESS;
|
END PROCESS;
|
||||||
|
|||||||
Reference in New Issue
Block a user