- FIFO: added reg_stage

git-svn-id: http://moon:8086/svn/vhdl/trunk@1608 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-31 08:01:43 +00:00
parent 4bce0d8107
commit 1970a91580
4 changed files with 292 additions and 0 deletions
@@ -0,0 +1,12 @@
+include $(VHDL_HOME)/make/defs.mk
+
+SRCS += $(LIB_PATH)/FIFO/src/reg_stage.vhd
+SRCS += $(LIB_PATH)/FIFO/src/tb_reg_stage.vhd
+
+# Compile
+TARGET := tb_reg_stage
+ENTITY := tb_reg_stage
+RUN_TIME := 1us
+
+include $(VHDL_HOME)/make/ghdl.mk
+