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- added two addtional UARTs

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git-svn-id: http://moon:8086/svn/vhdl/trunk@503 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-10-08 21:32:34 +00:00
parent b288e8ee43
commit 15d9de633c
2 changed files with 112 additions and 27 deletions
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projects/mips_sys/src/tb_mips_sys.vhd
+14 -2
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@@ -46,6 +46,10 @@ ARCHITECTURE behavior OF tb_mips_sys IS
signal led : unsigned(8 downto 0);
signal sys_rx : std_logic := '1';
signal sys_tx : std_logic;
signal sys_rx1 : std_logic := '1';
signal sys_tx1 : std_logic;
signal sys_rx2 : std_logic := '1';
signal sys_tx2 : std_logic;
signal sys_lcd_d : unsigned(3 downto 0);
signal sys_lcd_e : std_logic;
@@ -128,8 +132,12 @@ uut: entity work.mips_sys
sys_dip => dip,
sys_led => led,
sys_rx => sys_rx,
sys_tx => sys_tx,
sys_uart0_rx => sys_rx,
sys_uart0_tx => sys_tx,
sys_uart1_rx => sys_rx1,
sys_uart1_tx => sys_tx1,
sys_uart2_rx => sys_rx2,
sys_uart2_tx => sys_tx2,
sys_lcd_d => sys_lcd_d,
sys_lcd_e => sys_lcd_e,
@@ -322,8 +330,12 @@ STIMULUS: process
begin
btn(0) <= '1';
btn(2) <= '1';
wait for 3*CLK_PERIOD;
sys_rst_n_in <= '1';
btn(0) <= '0';
btn(2) <= '0';
wait for 200000*CLK_PERIOD;
loop