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[DE0-Nano]

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- cleaned up top level
- removed jtag regs
- added SPI clk to SDC

git-svn-id: http://moon:8086/svn/vhdl/trunk@1370 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2017-01-15 13:18:04 +00:00
parent ee807ecdc8
commit 087210ce5c
2 changed files with 1 additions and 42 deletions
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projects/mips_de0_nano/quartus/mips/JMips.sdc
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@@ -39,9 +39,9 @@ set_time_format -unit ns -decimal_places 3
# Create Clock
#**************************************************************
create_clock -name {altera_reserved_tck} -period 100.000 -waveform { 0.000 50.000 } [get_ports {altera_reserved_tck}]
create_clock -name {sys_clk} -period 20.000 -waveform { 0.000 10.000 } [get_ports { sys_clk }]
create_clock -name {SDRAM_clk} -period 10.000 -waveform { 0.000 5.000 } [get_ports {sys_sdram_clk}]
create_clock -name {spi_clk} -period 20.000 -waveform { 0.000 10.000 } [get_ports {spi_clk}]
#**************************************************************
@@ -78,7 +78,6 @@ derive_clock_uncertainty
# Set Clock Groups
#**************************************************************
set_clock_groups -asynchronous -group [get_clocks {altera_reserved_tck}]
#**************************************************************