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- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1541 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 10:27:33 +00:00
parent d0433ac19d
commit 06feba8f63
47 changed files with 255 additions and 357 deletions
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lib/CPUs/JCpu/ghdl/cpu_embedded.make
+4 -1
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@@ -1,3 +1,6 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
@@ -10,5 +13,5 @@ TARGET := cpu_embedded
ENTITY := tb_cpu_embedded
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/cpu_itest.make
+6 -3
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@@ -1,8 +1,11 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += ../src/itest_irom.vhdl
SRCS += ../src/tb_cpu_itest.vhd
@@ -11,5 +14,5 @@ TARGET := cpu_itest
ENTITY := tb_cpu
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/jcpu_core.inc
+13 -21
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@@ -1,28 +1,20 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := JCPU_CORE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
SRC_PATH := $(LIB_PATH)/CPUs/JCpu/src/core
# -----------------------------------------------------------
SRCS := $(SRC_PATH)/cpu_pkg.vhd
SRCS += $(SRC_PATH)/cpu.vhd
SRCS += $(SRC_PATH)/alu.vhd
SRCS += $(SRC_PATH)/chipram.vhd
SRCS += $(SRC_PATH)/chipreg.vhd
SRCS += $(SRC_PATH)/dpath_ctrl.vhd
SRCS += $(SRC_PATH)/int_ctrl.vhd
SRCS += $(SRC_PATH)/pc.vhd
SRCS += $(SRC_PATH)/reg_dual.vhd
SRCS += $(SRC_PATH)/stack_ctrl.vhd
MOD_PATH := $(LIB_PATH)/CPUs/JCpu/src/core
$(PKG_NAME)_SRCS += $(MOD_PATH)/cpu_pkg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/cpu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/alu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/chipram.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/chipreg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/dpath_ctrl.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/int_ctrl.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/pc.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/reg_dual.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/stack_ctrl.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
SRC_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/CPUs/JCpu/ghdl/mul8x8.make
+4 -1
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@@ -1,3 +1,6 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
@@ -10,5 +13,5 @@ TARGET := mul8x8
ENTITY := tb_cpu_embedded
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/reti_issue.make
+6 -3
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@@ -1,8 +1,11 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += ../src/reti_issue_irom.vhdl
SRCS += ../src/tb_cpu_itest.vhd
@@ -11,5 +14,5 @@ TARGET := reti_issue
ENTITY := tb_cpu
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/MIPS/ghdl/mips_core.inc
+19 -27
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@@ -1,33 +1,25 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := MIPS_CORE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/CPUs/MIPS/src/core
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_2w2r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_types.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_instr.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_alu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_bcu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_biu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_cop.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_dcache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_icache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_muldiv.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_pipeline.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_reg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_shifter.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_top.vhd
# -----------------------------------------------------------
SRCS += $(LIB_PATH)/rams/sim/src/dpram_2w2r2c_ra.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
SRCS += $(MOD_PATH)/mips_types.vhd
SRCS += $(MOD_PATH)/mips_instr.vhd
SRCS += $(MOD_PATH)/mips_alu.vhd
SRCS += $(MOD_PATH)/mips_bcu.vhd
SRCS += $(MOD_PATH)/mips_biu.vhd
SRCS += $(MOD_PATH)/mips_cop.vhd
SRCS += $(MOD_PATH)/mips_dcache.vhd
SRCS += $(MOD_PATH)/mips_icache.vhd
SRCS += $(MOD_PATH)/mips_muldiv.vhd
SRCS += $(MOD_PATH)/mips_pipeline.vhd
SRCS += $(MOD_PATH)/mips_reg.vhd
SRCS += $(MOD_PATH)/mips_shifter.vhd
SRCS += $(MOD_PATH)/mips_top.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
MOD_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/CPUs/MIPS/ghdl/tb_mips_top.make
+14 -10
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@@ -1,29 +1,33 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include mips_core.inc
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
# FIFOS
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
# UART
SRCS += ../../../uart/src/uart_types.vhd
SRCS += ../../../uart/src/sim/uart.vhd
SRCS += ../../../uart/src/uart_wb.vhd
SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
SRCS += $(LIB_PATH)/uart/src/uart_wb.vhd
# GPIO
SRCS += ../../../JBUS/gpio/src/gpio_wb.vhd
SRCS += $(LIB_PATH)/JBUS/gpio/src/gpio_wb.vhd
# Async port
SRCS += ../../../JBUS/async_port/src/async_types.vhd
SRCS += ../../../JBUS/async_port/src/async_port_wb.vhd
SRCS += $(LIB_PATH)/JBUS/async_port/src/async_types.vhd
SRCS += $(LIB_PATH)/JBUS/async_port/src/async_port_wb.vhd
SRCS += ../src/async_defs.vhd
# ROM
#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
SRCS += ../src/bootloader_flash.ROM.vhd
SRCS += ../../../JBUS/memory/src/rom_wb.vhd
SRCS += $(LIB_PATH)/JBUS/memory/src/rom_wb.vhd
# MIPS
SRCS += $(MIPS_CORE_SRCS)
@@ -37,5 +41,5 @@ ENTITY = tb_mips_top
RUN_TIME := 1500us
WITH_VCD := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk