jens
06feba8f63
git-svn-id: http://moon:8086/svn/vhdl/trunk@1541 cc03376c-175c-47c8-b038-4cd826a8556b
46 lines
1.2 KiB
Makefile
46 lines
1.2 KiB
Makefile
# -----------------------------------------------------------
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include $(VHDL_HOME)/make/defs.mk
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# -----------------------------------------------------------
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include mips_core.inc
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include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
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include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
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# -----------------------------------------------------------
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# FIFOS
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SRCS += $(FIFO_SYNC_SRCS)
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SRCS += $(FIFO_ASYNC_SRCS)
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# UART
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SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
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SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
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SRCS += $(LIB_PATH)/uart/src/uart_wb.vhd
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# GPIO
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SRCS += $(LIB_PATH)/JBUS/gpio/src/gpio_wb.vhd
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# Async port
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SRCS += $(LIB_PATH)/JBUS/async_port/src/async_types.vhd
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SRCS += $(LIB_PATH)/JBUS/async_port/src/async_port_wb.vhd
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SRCS += ../src/async_defs.vhd
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# ROM
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#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
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#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
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SRCS += ../src/bootloader_flash.ROM.vhd
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SRCS += $(LIB_PATH)/JBUS/memory/src/rom_wb.vhd
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# MIPS
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SRCS += $(MIPS_CORE_SRCS)
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# TB
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SRCS += ../src/tb_mips_top.vhd
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# Compile
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TARGET := tb_mips_top
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ENTITY = tb_mips_top
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RUN_TIME := 1500us
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WITH_VCD := y
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include $(VHDL_HOME)/make/ghdl.mk
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