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- refactored

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1541 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 10:27:33 +00:00
parent d0433ac19d
commit 06feba8f63
47 changed files with 255 additions and 357 deletions
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lib/CPUs/JCpu/ghdl/cpu_embedded.make
+4 -1
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@@ -1,3 +1,6 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
@@ -10,5 +13,5 @@ TARGET := cpu_embedded
ENTITY := tb_cpu_embedded
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/cpu_itest.make
+6 -3
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@@ -1,8 +1,11 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += ../src/itest_irom.vhdl
SRCS += ../src/tb_cpu_itest.vhd
@@ -11,5 +14,5 @@ TARGET := cpu_itest
ENTITY := tb_cpu
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/jcpu_core.inc
+13 -21
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@@ -1,28 +1,20 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := JCPU_CORE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
SRC_PATH := $(LIB_PATH)/CPUs/JCpu/src/core
# -----------------------------------------------------------
SRCS := $(SRC_PATH)/cpu_pkg.vhd
SRCS += $(SRC_PATH)/cpu.vhd
SRCS += $(SRC_PATH)/alu.vhd
SRCS += $(SRC_PATH)/chipram.vhd
SRCS += $(SRC_PATH)/chipreg.vhd
SRCS += $(SRC_PATH)/dpath_ctrl.vhd
SRCS += $(SRC_PATH)/int_ctrl.vhd
SRCS += $(SRC_PATH)/pc.vhd
SRCS += $(SRC_PATH)/reg_dual.vhd
SRCS += $(SRC_PATH)/stack_ctrl.vhd
MOD_PATH := $(LIB_PATH)/CPUs/JCpu/src/core
$(PKG_NAME)_SRCS += $(MOD_PATH)/cpu_pkg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/cpu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/alu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/chipram.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/chipreg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/dpath_ctrl.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/int_ctrl.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/pc.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/reg_dual.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/stack_ctrl.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
SRC_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/CPUs/JCpu/ghdl/mul8x8.make
+4 -1
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@@ -1,3 +1,6 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
@@ -10,5 +13,5 @@ TARGET := mul8x8
ENTITY := tb_cpu_embedded
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/JCpu/ghdl/reti_issue.make
+6 -3
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@@ -1,8 +1,11 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
SRCS += $(JCPU_CORE_SRCS)
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += ../src/reti_issue_irom.vhdl
SRCS += ../src/tb_cpu_itest.vhd
@@ -11,5 +14,5 @@ TARGET := reti_issue
ENTITY := tb_cpu
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/CPUs/MIPS/ghdl/mips_core.inc
+19 -27
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@@ -1,33 +1,25 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := MIPS_CORE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/CPUs/MIPS/src/core
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_2w2r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_types.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_instr.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_alu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_bcu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_biu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_cop.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_dcache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_icache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_muldiv.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_pipeline.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_reg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_shifter.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_top.vhd
# -----------------------------------------------------------
SRCS += $(LIB_PATH)/rams/sim/src/dpram_2w2r2c_ra.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
SRCS += $(MOD_PATH)/mips_types.vhd
SRCS += $(MOD_PATH)/mips_instr.vhd
SRCS += $(MOD_PATH)/mips_alu.vhd
SRCS += $(MOD_PATH)/mips_bcu.vhd
SRCS += $(MOD_PATH)/mips_biu.vhd
SRCS += $(MOD_PATH)/mips_cop.vhd
SRCS += $(MOD_PATH)/mips_dcache.vhd
SRCS += $(MOD_PATH)/mips_icache.vhd
SRCS += $(MOD_PATH)/mips_muldiv.vhd
SRCS += $(MOD_PATH)/mips_pipeline.vhd
SRCS += $(MOD_PATH)/mips_reg.vhd
SRCS += $(MOD_PATH)/mips_shifter.vhd
SRCS += $(MOD_PATH)/mips_top.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
MOD_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/CPUs/MIPS/ghdl/tb_mips_top.make
+14 -10
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@@ -1,29 +1,33 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include mips_core.inc
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
# FIFOS
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
# UART
SRCS += ../../../uart/src/uart_types.vhd
SRCS += ../../../uart/src/sim/uart.vhd
SRCS += ../../../uart/src/uart_wb.vhd
SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd
SRCS += $(LIB_PATH)/uart/src/uart_wb.vhd
# GPIO
SRCS += ../../../JBUS/gpio/src/gpio_wb.vhd
SRCS += $(LIB_PATH)/JBUS/gpio/src/gpio_wb.vhd
# Async port
SRCS += ../../../JBUS/async_port/src/async_types.vhd
SRCS += ../../../JBUS/async_port/src/async_port_wb.vhd
SRCS += $(LIB_PATH)/JBUS/async_port/src/async_types.vhd
SRCS += $(LIB_PATH)/JBUS/async_port/src/async_port_wb.vhd
SRCS += ../src/async_defs.vhd
# ROM
#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
SRCS += ../src/bootloader_flash.ROM.vhd
SRCS += ../../../JBUS/memory/src/rom_wb.vhd
SRCS += $(LIB_PATH)/JBUS/memory/src/rom_wb.vhd
# MIPS
SRCS += $(MIPS_CORE_SRCS)
@@ -37,5 +41,5 @@ ENTITY = tb_mips_top
RUN_TIME := 1500us
WITH_VCD := y
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/FIFO/ghdl/fifo_async.inc
+7 -14
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@@ -1,21 +1,14 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIFO_ASYNC
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
SRCS += $(LIB_PATH)/FIFO/src/gray_counter.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_async_ctrl.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_async.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/gray_counter.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_async_ctrl.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_async.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/FIFO/ghdl/fifo_sync.inc
+6 -13
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@@ -1,20 +1,13 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIFO_SYNC
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_sync_ctrl.vhd
SRCS += $(LIB_PATH)/FIFO/src/fifo_sync.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_sync_ctrl.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_sync.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/FIFO/ghdl/tb_fifo_async.make
+2 -1
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@@ -1,3 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include fifo_async.inc
ROOT_PATH := ../../..
@@ -12,5 +13,5 @@ ENTITY := tb_fifo_async
WITH_VCD := y
RUN_TIME := 5us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/FIFO/ghdl/tb_fifo_sync.make
+2 -1
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@@ -1,3 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include fifo_sync.inc
ROOT_PATH := ../../..
@@ -12,5 +13,5 @@ ENTITY := tb_fifo_sync
WITH_VCD := y
RUN_TIME := 5us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/FIFO/ghdl/tb_gray_counter.make
+2 -3
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@@ -1,5 +1,4 @@
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
SRCS += $(LIB_PATH)/FIFO/src/gray_counter.vhd
@@ -11,5 +10,5 @@ ENTITY := tb_gray_counter
WITH_VCD := y
RUN_TIME := 1us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/busmaster/ghdl/tb_busmaster_async.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_async.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -16,5 +15,5 @@ ENTITY := tb_busmaster_async
WITH_VCD := y
RUN_TIME := 80us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/busmaster/ghdl/tb_busmaster_sync.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -16,5 +15,5 @@ ENTITY := tb_busmaster_sync
WITH_VCD := y
RUN_TIME := 40us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/dmac/ghdl/tb_dmac_sync.make
+3 -4
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@@ -1,7 +1,6 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -17,5 +16,5 @@ ENTITY := tb_dmac
WITH_VCD := y
RUN_TIME := 6us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/memory/ghdl/tb_ram_wb.make
+3 -5
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@@ -1,5 +1,5 @@
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -13,6 +13,4 @@ ENTITY := tb_ram_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/JBUS/memory/ghdl/tb_rom_wb.make
+3 -4
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@@ -1,5 +1,5 @@
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(MOD_PATH)/src/rom_sim.vhd
@@ -12,6 +12,5 @@ ENTITY := tb_rom_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb32.make
+7 -5
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@@ -1,8 +1,10 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/SDRAM/ddr_sdr_v1_5
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
@@ -29,5 +31,5 @@ RUN_TIME := 200us
GHDL_OPTS := -P$(ROOT_PATH)/Common/sim/build/unisim/unisim -fsynopsys -fexplicit
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb64.make
+7 -6
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@@ -1,10 +1,11 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/SDRAM/ddr_sdr_v1_5
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/models/memory/sdram/mt46v16m16/mt46v16m16.vhd
SRCS += $(FIFO_SYNC_SRCS)
@@ -29,5 +30,5 @@ RUN_TIME := 200us
GHDL_OPTS := -P$(ROOT_PATH)/Common/sim/build/unisim/unisim -fsynopsys -fexplicit
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/emac/ghdl/emac_jbus.inc
+7 -14
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@@ -1,23 +1,16 @@
# -----------------------------------------------------------
include emac_tx.inc
include emac_rx.inc
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/emac/ghdl/emac_tx.inc
include $(LIB_PATH)/emac/ghdl/emac_rx.inc
# -----------------------------------------------------------
PKG_NAME := EMAC_JBUS
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS += $(EMAC_RX_SRCS)
SRCS += $(EMAC_TX_SRCS)
SRCS += $(LIB_PATH)/emac/src/emac_top_jb.vhd
$(PKG_NAME)_SRCS += $(EMAC_RX_SRCS)
$(PKG_NAME)_SRCS += $(EMAC_TX_SRCS)
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/emac_top_jb.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/emac/ghdl/emac_rx.inc
+11 -17
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@@ -1,25 +1,19 @@
# -----------------------------------------------------------
include ../../../lib/FIFO/ghdl/fifo_async.inc
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
PKG_NAME := EMAC_RX
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
SRCS += $(FIFO_ASYNC_SRCS)
SRCS += $(LIB_PATH)/emac/src/sipo.vhd
SRCS += $(LIB_PATH)/emac/src/crc32.vhd
SRCS += $(LIB_PATH)/emac/src/emac_types.vhd
SRCS += $(LIB_PATH)/emac/src/emac_rx.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/sipo.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/crc32.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/emac_types.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/emac_rx.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/emac/ghdl/emac_tx.inc
+13 -19
View File
@@ -1,27 +1,21 @@
# -----------------------------------------------------------
include ../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../lib/FIFO/ghdl/fifo_async.inc
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
PKG_NAME := EMAC_TX
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
SRCS := $(PKG_NAME)_SRCS
# -----------------------------------------------------------
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
SRCS += $(LIB_PATH)/emac/src/piso.vhd
SRCS += $(LIB_PATH)/emac/src/crc32.vhd
SRCS += $(LIB_PATH)/emac/src/emac_types.vhd
SRCS += $(LIB_PATH)/emac/src/emac_tx.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
$(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/piso.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/crc32.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/emac_types.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/emac/src/emac_tx.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/emac/ghdl/tb_emac_top_jb.make
+3 -5
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@@ -1,9 +1,7 @@
include $(VHDL_HOME)/make/defs.mk
include emac_jbus.inc
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
SRCS += $(EMAC_JBUS_SRCS)
SRCS := $(EMAC_JBUS_SRCS)
SRCS += $(LIB_PATH)/emac/src/pkt_gen.vhd
SRCS += $(LIB_PATH)/emac/src/tb_emac_top_jb.vhd
@@ -13,5 +11,5 @@ ENTITY := tb_emac_top_jb
WITH_VCD := y
RUN_TIME := 2000us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/filter/ghdl/fir_iterative.inc
+9 -16
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@@ -1,23 +1,16 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_ITERATIVE
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_stage_sys.vhd
SRCS += $(LIB_PATH)/filter/src/fir_stage.vhd
SRCS += $(LIB_PATH)/filter/src/fir_iterative.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_stage_sys.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_iterative.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/filter/ghdl/fir_parallel.inc
+8 -15
View File
@@ -1,22 +1,15 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_PARALLEL
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_stage.vhd
SRCS += $(LIB_PATH)/filter/src/fir_parallel.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_parallel.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/filter/ghdl/fir_semi_parallel.inc
+10 -17
View File
@@ -1,24 +1,17 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_SEMI_PARALLEL
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
SRCS += $(LIB_PATH)/filter/src/fir_stage_sys.vhd
SRCS += $(LIB_PATH)/filter/src/delay_line.vhd
SRCS += $(LIB_PATH)/filter/src/fir_semi_parallel.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ro.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/filter_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_stage_sys.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/delay_line.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/filter/src/fir_semi_parallel.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/filter/ghdl/tb_fir_iterative.make
+2 -1
View File
@@ -1,3 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include fir_iterative.inc
ROOT_PATH := ../../..
@@ -15,5 +16,5 @@ WITH_VCD := y
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
RUN_TIME := 6us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/filter/ghdl/tb_fir_parallel.make
+2 -1
View File
@@ -1,3 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include fir_parallel.inc
ROOT_PATH := ../../..
@@ -15,5 +16,5 @@ WITH_VCD := y
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
RUN_TIME := 200us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/filter/ghdl/tb_fir_semi_parallel.make
+2 -1
View File
@@ -1,3 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include fir_semi_parallel.inc
ROOT_PATH := ../../..
@@ -15,5 +16,5 @@ WITH_VCD := y
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
RUN_TIME := 50us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/filter/ghdl/tb_fir_stage.make
+2 -3
View File
@@ -1,5 +1,4 @@
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
@@ -17,5 +16,5 @@ WITH_VCD := y
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
RUN_TIME := 2us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/filter/ghdl/tb_fir_stage_sys.make
+2 -3
View File
@@ -1,5 +1,4 @@
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
@@ -17,5 +16,5 @@ WITH_VCD := y
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
RUN_TIME := 2us
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/ps2_port/ghdl/tb_ps2_core.make
+3 -3
View File
@@ -1,5 +1,5 @@
ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(VHDL_HOME)/make/defs.mk
MOD_PATH := $(ROOT_PATH)/lib/ps2_port
SRCS += $(MOD_PATH)/src/ps2_core.vhd
@@ -11,5 +11,5 @@ ENTITY := tb_ps2_core
WITH_VCD := y
RUN_TIME := 10ms
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/radio/cordic/ghdl/cordic_iterative.inc
+9 -16
View File
@@ -1,23 +1,16 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := CORDIC_ITERATIVE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pkg.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_rom.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage_pre.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage_post.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_top.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_rom.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage_pre.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_stage_post.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_top.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/radio/cordic/ghdl/cordic_pipe.inc
+8 -15
View File
@@ -1,22 +1,15 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := CORDIC_PIPE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pkg.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_stage.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_pre.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_post.vhd
SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_top.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_pre.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_post.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/cordic/src/cordic_pipe_top.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/radio/cordic/ghdl/tb_cordic_iterative_top.make
+2 -3
View File
@@ -1,4 +1,5 @@
# -------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include cordic_iterative.inc
# -------------------------------------------------
@@ -11,8 +12,6 @@ WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
LIB_PATH := ../../../../lib
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(CORDIC_ITERATIVE_SRCS)
@@ -27,5 +26,5 @@ RUN_TIME := 300us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
# -------------------------------------------------
lib/radio/cordic/ghdl/tb_cordic_pipe_top.make
+3 -3
View File
@@ -1,4 +1,5 @@
# -------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include cordic_pipe.inc
# -------------------------------------------------
@@ -11,8 +12,6 @@ WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
LIB_PATH := ../../../../lib
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(CORDIC_PIPE_SRCS)
@@ -27,5 +26,6 @@ RUN_TIME := 150us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
# -------------------------------------------------
lib/radio/ddc/ghdl/tb_ddc.make
+6 -7
View File
@@ -1,10 +1,9 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/filter/ghdl/fir_semi_parallel.inc
include ../../../../lib/radio/nco/ghdl/mix_cordic_pipe.inc
include ../../../../lib/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
include $(VHDL_HOME)/make/defs.mk
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/filter/ghdl/fir_semi_parallel.inc
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
include $(LIB_PATH)/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIR_SEMI_PARALLEL_SRCS)
@@ -23,5 +22,5 @@ RUN_TIME := 100us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/radio/ddc/ghdl/tb_syn_ddc.make
+7 -8
View File
@@ -1,11 +1,10 @@
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
include ../../../../lib/filter/ghdl/fir_semi_parallel.inc
include ../../../../lib/radio/nco/ghdl/mix_cordic_pipe.inc
include ../../../../lib/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
include $(VHDL_HOME)/make/defs.mk
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/filter/ghdl/fir_semi_parallel.inc
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
include $(LIB_PATH)/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(FIFO_SYNC_SRCS)
@@ -27,5 +26,5 @@ RUN_TIME := 100us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
+7 -14
View File
@@ -1,21 +1,14 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := CIC_DECIM_PIPE
ROOT_PATH := ../../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_i_pipe.vhd
SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_c_pipe.vhd
SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_decim_pipe.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/misc/utils_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_i_pipe.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_c_pipe.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/decimator/CIC/src/cic_decim_pipe.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/radio/decimator/CIC/ghdl/tb_cic_decim_pipe.make
+2 -4
View File
@@ -1,8 +1,6 @@
include $(VHDL_HOME)/make/defs.mk
include cic_decim_pipe.inc
ROOT_PATH := ../../../../..
LIB_PATH := $(ROOT_PATH)/lib
SRCS += $(CIC_DECIM_PIPE_SRCS)
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
@@ -16,5 +14,5 @@ RUN_TIME := 75us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include $(ROOT_PATH)/Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
lib/radio/nco/ghdl/mix_cordic_pipe.inc
+4 -12
View File
@@ -1,20 +1,12 @@
# -----------------------------------------------------------
include ../../../../lib/radio/cordic/ghdl/cordic_pipe.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/radio/cordic/ghdl/cordic_pipe.inc
# -----------------------------------------------------------
PKG_NAME := MIX_CORDIC_PIPE
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(CORDIC_PIPE_SRCS)
SRCS += $(LIB_PATH)/radio/nco/src/mix_cordic_pipe.vhd
$(PKG_NAME)_SRCS := $(CORDIC_PIPE_SRCS)
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/nco/src/mix_cordic_pipe.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/radio/nco/ghdl/nco_lut.inc
+7 -14
View File
@@ -1,21 +1,14 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
PKG_NAME := NCO_LUT
ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
CUR_PATH := $(shell dirname $(lastword $(MAKEFILE_LIST)))
# -----------------------------------------------------------
SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
SRCS += $(LIB_PATH)/radio/nco/src/nco_pkg.vhd
SRCS += $(LIB_PATH)/radio/nco/src/waverom_dual.vhd
SRCS += $(LIB_PATH)/radio/nco/src/wavelut.vhd
SRCS += $(LIB_PATH)/radio/nco/src/nco_lut_dbg.vhd
$(PKG_NAME)_SRCS := $(LIB_PATH)/fixed/ieee_proposed/fixed_util_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/nco/src/nco_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/nco/src/waverom_dual.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/nco/src/wavelut.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/radio/nco/src/nco_lut_dbg.vhd
# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(addprefix $(CUR_PATH)/,$(SRCS))
SRCS :=
CUR_PATH :=
ROOT_PATH :=
LIB_PATH :=
lib/radio/nco/ghdl/tb_mix_cordic.make
+3 -6
View File
@@ -1,7 +1,6 @@
# -------------------------------------------------
# Includes
# -------------------------------------------------
include mix_cordic_pipe.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
# -------------------------------------------------
# Global options
@@ -13,8 +12,6 @@ WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
LIB_PATH := ../../../../lib
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(MIX_CORDIC_PIPE_SRCS)
@@ -29,7 +26,7 @@ RUN_TIME := 200us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
# -------------------------------------------------
lib/radio/nco/ghdl/tb_nco_cordic.make
+3 -6
View File
@@ -1,7 +1,6 @@
# -------------------------------------------------
# Includes
# -------------------------------------------------
include mix_cordic_pipe.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
# -------------------------------------------------
# Global options
@@ -13,8 +12,6 @@ WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
LIB_PATH := ../../../../lib
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(MIX_CORDIC_PIPE_SRCS)
@@ -29,7 +26,7 @@ RUN_TIME := 250us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
# -------------------------------------------------
lib/radio/nco/ghdl/tb_nco_lut.make
+3 -4
View File
@@ -1,5 +1,6 @@
# -------------------------------------------------
include nco_lut.inc
include $(VHDL_HOME)/make/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/nco_lut.inc
# -------------------------------------------------
# Global options
@@ -11,8 +12,6 @@ WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
LIB_PATH := ../../../../lib
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(NCO_LUT_SRCS)
@@ -27,6 +26,6 @@ RUN_TIME := 250us
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include ../../../../Common/make/ghdl.mk
include $(VHDL_HOME)/make/ghdl.mk
# -------------------------------------------------