This commit was manufactured by cvs2svn to create branch 'BRANCH_MIPS_TLB'.

git-svn-id: http://moon:8086/svn/vhdl/branches/BRANCH_MIPS_TLB@1000 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2013-08-18 07:07:28 +00:00
parent c0bf39885e
commit 06875daf11
451 changed files with 0 additions and 115651 deletions
@@ -1,47 +0,0 @@
ENDIAN='big'
ifeq ($(ENDIAN), 'big')
ENDIAN_FLAGS=-EB
LIB_DIRS=-L $(MIPS_TOOLS_PREFIX)/mipsel-elf/lib/eb -L $(MIPS_TOOLS_PREFIX)/lib/gcc/mipsel-elf/$(MIPS_GCC_VER)/eb
else
ENDIAN_FLAGS=-EL
LIB_DIRS=-L $(MIPS_TOOLS_PREFIX)/mipsel-elf/lib -L $(MIPS_TOOLS_PREFIX)/lib/gcc/mipsel-elf/$(MIPS_GCC_VER)
endif
CFLAGS=$(ENDIAN_FLAGS) -Os -I. -I../ -I../libsys -msoft-float -march=r3000
LFLAGS=$(ENDIAN_FLAGS) -M -T bootloader.ld
LIBS=-lc -lgcc
CC=mipsel-elf-gcc
LD=mipsel-elf-ld
OBJDUMP=mipsel-elf-objdump
OBJCOPY=mipsel-elf-objcopy
all: bootloader_flash
libsys: startup_boot.S init_boot.S kernel_boot.S libsys_boot.c
$(CC) $(CFLAGS) -c startup_boot.S -o startup.o
$(CC) $(CFLAGS) -c init_boot.S -o init.o
$(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o
$(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o
bootloader: libsys bootloader.c
$(CC) $(CFLAGS) -g -c bootloader.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o bootloader.o -o bootloader.elf $(LIBS) >bootloader.map
$(OBJDUMP) -d bootloader.elf > bootloader.dis
$(OBJCOPY) bootloader.elf -O binary bootloader.ROM.bin
$(OBJCOPY) -O srec bootloader.elf bootloader.srec
romgen bootloader.ROM.bin 10 $(ENDIAN_FLAGS)
bootloader_flash: libsys bootloader_with_flash.c
$(CC) $(CFLAGS) -g -c bootloader_with_flash.c
$(CC) $(CFLAGS) -g -c ../cfiflash.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o init.o kernel.o libsys.o cfiflash.o bootloader_with_flash.o -o bootloader.elf $(LIBS) >bootloader.map
$(OBJDUMP) -d bootloader.elf > bootloader.dis
$(OBJCOPY) bootloader.elf -O binary bootloader.ROM.bin
$(OBJCOPY) -O srec bootloader.elf bootloader.srec
romgen bootloader.ROM.bin 11 $(ENDIAN_FLAGS)
clean:
rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null
@@ -1,247 +0,0 @@
#include "libsys_boot.h"
typedef struct _ssrec_t
{
UINT32 addr;
UINT32 size;
UINT32 type;
UINT8 *data;
} srec_t;
enum srec_type
{
srec_err, srec_sob, srec_data, srec_rec, srec_eob
};
UINT8 h2i(UINT8 *c)
{
int i;
UINT8 t, b = 0;
for (i=0; i < 2; i++)
{
t = c[i];
if (t >= 'A')
t = t - 'A' + 10;
else
t -= '0';
b = (b << 4) | t;
}
return b;
}
int decode_srec(srec_t *pRec, UINT8 *pBuf, int buflen)
{
UINT8 chksum, byte;
int alen, i;
if (!buflen)
return srec_err;
pRec->type = srec_rec;
alen = 0;
if ((pBuf[1] > '0') && (pBuf[1] < '4'))
{
alen = pBuf[1] - '0' + 1;
pRec->type = srec_data;
}
else if ((pBuf[1] >= '7') && (pBuf[1] <= '9'))
{
alen = 11 - (pBuf[1] - '0');
pRec->type = srec_eob;
}
else if (pBuf[1] == '0')
{
alen = 2;
pRec->type = srec_sob;
}
byte = h2i(&pBuf[2]);
pRec->size = byte;
chksum = byte;
pRec->addr = 0;
for (i=0; i < alen; i++)
{
byte = h2i(&pBuf[4+2*i]);
pRec->addr = pRec->addr << 8 | byte;
chksum += byte;
}
pRec->size -= (alen+1);
pRec->data = (UINT8*) &pBuf[4 + 2*alen];
for (i=0; i < (int)pRec->size; i++)
{
byte = h2i(&pRec->data[2*i]);
pRec->data[i] = byte;
chksum += byte;
}
chksum = ~chksum;
byte = h2i(&pRec->data[2*i]);
if (chksum != byte)
return 0;
return pRec->type;
}
int srec_getline(UINT8 *pLine)
{
char c;
int i = 0;
do
{
c = readchar();
} while ((c != 's') && (c != 'S'));
while(((c != 0x0D) && (c != 0x0A)))
{
pLine[i++] = c;
c = readchar();
};
return i;
}
void Jump_to(void *pEntry)
{
__asm
(
".set noreorder\n"
);
__asm
(
"jr %[pEntry]\n" // jump entry
:
: [pEntry] "r" (pEntry)
);
__asm
(
"nop\n"
);
__asm
(
".set reorder\n"
);
}
void Exec_at(void *pEntry)
{
__asm
(
".set noreorder\n"
);
__asm
(
"mfc0 $26, $12\n" // change exception vector
"li $27, 0xFFBFFFFF\n"
"and $26, $27\n"
"mtc0 $26, $12\n"
);
__asm
(
"lw $v0, 16($sp)\n"
"nop\n"
"jr $v0\n" // jump entry
"rfe\n"
);
__asm
(
".set reorder\n"
);
}
void PrintCPUinfo(void)
{
int result, rev_id;
char *cpu_type_str[7] = {"invalid", "R2000", "R3000", "R6000", "R4000", "reserved", "R6000A"};
// Print Status register
result = CP0_SR_read();
sputs("Status : ");
print_word(result);
sputs("\n");
// Print Revision
result = CP0_PRID_read();
rev_id = (result >> 8) & 0xFF;
sputs("CPU type: ");
if ((rev_id > 0) && (rev_id < 0x07))
{
sputs(cpu_type_str[rev_id]);
sputs(" Rev.");
rev_id = result & 0xFF;
print_byte((char)rev_id);
}
else
sputs("Unknown");
sputs("\n");
}
#define MAX_IMG_SIZE (1024*1024) // bytes
int main(int argc, char *argv[])
{
UINT8 buf[256];
srec_t srec;
int result, srec_state, i;
UINT32 haddr;
volatile UINT8 *pMem;
haddr = 0;
// ----------------------------------------------------------
sputs("\n\n");
PrintCPUinfo();
sputs("Booting from UART..");
while(1)
{
sputs(".");
while(1)
{
result = srec_getline(buf);
srec_state = decode_srec(&srec, buf, result);
switch (srec_state)
{
case srec_data:
if ((srec.addr + srec.size) > haddr)
haddr = srec.addr + srec.size;
pMem = (UINT8*)srec.addr;
for (i=0; i < srec.size; i++)
*pMem++ = srec.data[i];
break;
case srec_eob:
sputs("done\n\n");
sputs("Execute program at ");
print_word(srec.addr);
sputs("\n\n");
Exec_at((void*)srec.addr);
break;
default:
result = -1;
break;
}
if (result < 0)
{
break;
}
};
}
return 0;
}
@@ -1,53 +0,0 @@
MEMORY
{
rom : ORIGIN = 0xBFC00000, LENGTH = 0x00002000 /* 8K */
ram : ORIGIN = 0x40000000, LENGTH = 0x00002000 /* 8K */
}
OUTPUT_ARCH(mips)
SEARCH_DIR(".");
SEARCH_DIR("/usr/local/mipsel-elf/lib:/usr/local/mipsel-elf/lib/eb");
SEARCH_DIR("/usr/local/lib/gcc/mipsel-elf/4.3.3:/usr/local/lib/gcc/mipsel-elf/4.3.3/eb");
stack_ptr = 0x7FFFEFF0;
baudrate = 0x0D;
sys_led_port = 0xA0000000;
sys_uart_data = 0xA0010000;
sys_uart_stat = 0xA0010004;
sys_uart_baud = 0xA0010008;
sys_timer_usec = 0xA000008;
sys_timer_sec = 0xA000000C;
SECTIONS
{
.init ORIGIN(rom) :
{
start = ALIGN(4);
entry = ALIGN(4);
_entry = ALIGN(4);
__entry = ALIGN(4);
*(.stext)
} > rom
.ktext ORIGIN(rom) + 0x180 :
{
*(.ktext)
} > rom
.text . :
{
*(.text)
} > rom
.rodata . :
{
*(.rodata*)
} > rom
.data ORIGIN(ram) :
{
*(.*data) *(.*bss) *(.*common)
} > ram
}
@@ -1,383 +0,0 @@
#include "libsys_boot.h"
#include "cfiflash.h"
#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian;
#define MAGIC_EL 0x3149464A // "JFI1" in little-endian;
typedef struct _ssrec_t
{
UINT32 addr;
UINT32 size;
UINT32 type;
UINT8 *data;
} srec_t;
typedef struct _sflash_alloc_tbl_t
{
UINT32 images[16];
} flash_alloc_tbl_t;
typedef struct _sflash_img_hdr_t
{
UINT32 magic;
UINT32 target_base;
UINT32 img_base;
UINT32 img_size;
UINT32 hdr_next;
UINT8 img_name[128];
UINT8 res[108];
} flash_img_hdr_t;
enum srec_type
{
srec_err, srec_sob, srec_data, srec_rec, srec_eob
};
UINT8 h2i(UINT8 *c)
{
int i;
UINT8 t, b = 0;
for (i=0; i < 2; i++)
{
t = c[i];
if (t >= 'A')
t = t - 'A' + 10;
else
t -= '0';
b = (b << 4) | t;
}
return b;
}
int decode_srec(srec_t *pRec, UINT8 *pBuf, int buflen)
{
UINT8 chksum, byte;
int alen, i;
if (!buflen)
return srec_err;
pRec->type = srec_rec;
alen = 0;
if ((pBuf[1] > '0') && (pBuf[1] < '4'))
{
alen = pBuf[1] - '0' + 1;
pRec->type = srec_data;
}
else if ((pBuf[1] >= '7') && (pBuf[1] <= '9'))
{
alen = 11 - (pBuf[1] - '0');
pRec->type = srec_eob;
}
else if (pBuf[1] == '0')
{
alen = 2;
pRec->type = srec_sob;
}
byte = h2i(&pBuf[2]);
pRec->size = byte;
chksum = byte;
pRec->addr = 0;
for (i=0; i < alen; i++)
{
byte = h2i(&pBuf[4+2*i]);
pRec->addr = pRec->addr << 8 | byte;
chksum += byte;
}
pRec->size -= (alen+1);
pRec->data = (UINT8*) &pBuf[4 + 2*alen];
for (i=0; i < (int)pRec->size; i++)
{
byte = h2i(&pRec->data[2*i]);
pRec->data[i] = byte;
chksum += byte;
}
chksum = ~chksum;
byte = h2i(&pRec->data[2*i]);
if (chksum != byte)
return 0;
return pRec->type;
}
int srec_getline(UINT8 *pLine)
{
char c;
int i = 0;
do
{
c = readchar();
} while ((c != 's') && (c != 'S'));
while(((c != 0x0D) && (c != 0x0A)))
{
pLine[i++] = c;
c = readchar();
};
return i;
}
void Jump_to(void *pEntry)
{
__asm
(
".set noreorder\n"
);
__asm
(
"jr %[pEntry]\n" // jump entry
:
: [pEntry] "r" (pEntry)
);
__asm
(
"nop\n"
);
__asm
(
".set reorder\n"
);
}
void Exec_at(void *pEntry)
{
__asm
(
".set noreorder\n"
);
__asm
(
"li $26, 0x10000000\n"
"mtc0 $26, $12\n"
);
__asm
(
"jr %[pEntry]\n" // jump entry
:
: [pEntry] "r" (pEntry)
);
__asm
(
"rfe\n"
);
__asm
(
".set reorder\n"
);
}
void Exec_RE_at(void *pEntry)
{
__asm
(
".set noreorder\n"
);
__asm
(
"mfc0 $26, $12\n" // change exception vector
"li $27, 0xFFBFFFFF\n"
"and $26, $27\n"
"li $27, 0x02000000\n" // Reverse Endianess
"or $26, $27\n"
"mtc0 $26, $12\n"
);
__asm
(
"jr %[pEntry]\n" // jump entry
:
: [pEntry] "r" (pEntry)
);
__asm
(
"rfe\n"
);
__asm
(
".set reorder\n"
);
}
#define MAX_IMG_SIZE (1024*1024) // bytes
#define SDRAM_BASE 0x40000000
#define FLASH_USE_BLOCK 1
int main(int argc, char *argv[])
{
UINT8 buf[256];
srec_t srec;
int srec_state, i;
UINT32 haddr, result;
flash_t flash;
flash_img_hdr_t img_hdr = {0};
flash_img_hdr_t *pImg_hdr;
UINT32 img_size, block_sel;
volatile UINT32 *pLED = (UINT32*)SYS_LED_PORT;
volatile UINT32 *pBtn = (UINT32*)SYS_GPIO0;
volatile UINT32 *pDip = (UINT32*)SYS_GPIO1;
volatile UINT8 *pMem;
volatile UINT32 *pFlashIO = (UINT32*)SYS_FLASH_IO; // Flash in uncached area
volatile UINT32 *pFlashMem = (UINT32*)SYS_FLASH_MEM; // Flash in cached area
volatile UINT32 *ram32 = (UINT32*)SDRAM_BASE;
UINT32 flash_offset;
*pLED = 0;
haddr = 0;
block_sel = 0x7F & (UINT32)*pDip;
// ----------------------------------------------------------
if (IS_ERROR(flash_find(&flash, SYS_FLASH_IO)))
{
sputs("Cannot find flash device. Exit now!\n\n");
return 1;
}
// Get flash offset by value of DIP-switch
flash_offset = flash_get_offset_by_blocknum(&flash, block_sel);
ram32 = (UINT32*)(SDRAM_BASE);
pFlashIO = (UINT32*)(SYS_FLASH_IO + flash_offset);
if (!(*pBtn & 8))
{
sputs("\n\n");
pImg_hdr = (flash_img_hdr_t*)pFlashIO;
if ((pImg_hdr->magic != MAGIC_EL) && (pImg_hdr->magic != MAGIC_EB))
{
sputs("\n\n");
sputs("Invalid image found at ");print_word(flash_offset); sputs(". Abort.\n");
return 1;
}
sputs("Booting application from flash (");print_word(flash_offset);sputs(")...");
ram32 = (UINT32*)pImg_hdr->target_base;
img_size = pImg_hdr->img_size;
// It's safe to use cached Flash,
// because D-Cache was invalidated during execution of start code
pFlashMem = (UINT32*)(SYS_FLASH_MEM + pImg_hdr->img_base);
for (i=0; i < img_size/4; i++)
ram32[i] = pFlashMem[i];
sputs("done\n");
sputs("Execute at ");print_word(pImg_hdr->target_base); sputs("\n\n");
Exec_at((void*)ram32);
}
else
{
sputs("\n\n");
sputs("Reading HEX-Record from UART..");
// Erase SDRAM
for (i=0; i < MAX_IMG_SIZE/4; i++)
ram32[i] = 0;
while(1)
{
sputs(".");
while(1)
{
result = srec_getline(buf);
srec_state = decode_srec(&srec, buf, result);
*pLED = 0;
switch (srec_state)
{
case srec_data:
if ((srec.addr + srec.size) > haddr)
haddr = srec.addr + srec.size;
pMem = (UINT8*)srec.addr;
for (i=0; i < srec.size; i++)
*pMem++ = srec.data[i];
break;
case srec_eob:
sputs("done\n\n");
img_hdr.magic = MAGIC_EB;
img_hdr.target_base = srec.addr;
img_hdr.img_size = haddr - srec.addr;
img_hdr.img_base = flash_offset + sizeof(flash_img_hdr_t);
img_hdr.hdr_next = flash_get_offset_blockaligned(&flash, img_hdr.img_base + img_hdr.img_size);
sputs("Size of application : ");print_word(img_hdr.img_size); sputs("\n");
sputs("Programming flash at : ");print_word(flash_offset); sputs("\n");
sputs("Next free flash offset : ");print_word(img_hdr.hdr_next); sputs("\n");
sputs("Flash erase...");
result = flash_erase(&flash, flash_offset, img_hdr.img_size + sizeof(flash_img_hdr_t));
if (IS_ERROR(result))
{
sputs("failed (");print_word(result);sputs(")\n");
break;
}
sputs("done\n");
sputs("Flash write...");
result = flash_program(&flash, flash_offset, (UINT8*)&img_hdr, sizeof(flash_img_hdr_t));
if (IS_ERROR(result))
{
sputs("failed (");print_word(result);sputs(")\n");
break;
}
result = flash_program(&flash, img_hdr.img_base, (UINT8*)img_hdr.target_base, img_hdr.img_size);
if (IS_ERROR(result))
{
sputs("failed (");print_word(result);sputs(")\n");
break;
}
sputs("done\n");
sputs("Flash verify...");
result = flash_verify(&flash, img_hdr.img_base, (UINT8*)img_hdr.target_base, img_hdr.img_size);
if (IS_ERROR(result))
{
sputs("failed (");print_word(result);sputs(")\n");
break;
}
sputs("passed\n");
// Jump to reset vector
Jump_to((void*)0xBFC00000);
break;
default:
result = -1;
break;
}
if (IS_ERROR(result))
{
*pLED = 0x40000000;
break;
}
};
}
}
return 0;
}
@@ -1,19 +0,0 @@
.file "init.S"
.text
.section .init,"ax"
.align 2
.globl _init
.extern end
_init:
.set noreorder
# set uart
la $26, sys_uart_baud
addiu $27, $0, baudrate
sw $27, 0($26)
jr $ra
.set reorder
@@ -1,13 +0,0 @@
@rem
@rem Setup Chipscope's TCL JTAG path
@rem
@rem Usage: cs_xtclsh.bat args...
@rem
@date /T > date.tmp
@date 15.03.2009
@set CS_PATH=%XILINX%\ChipScope\bin\nt
@echo %CS_PATH%
@call %CS_PATH%\cs_xtclsh bootloader.ROM.tcl
@type date.tmp | date >nul
@del date.tmp
@@ -1,46 +0,0 @@
.file "kernel.S"
.section .ktext,"ax"
.align 2
.macro kpush reg
addiu $sp, 4
sw \reg, 0($sp)
.endm
.macro kpop reg
lw \reg, 0($sp)
addiu $sp, -4
.endm
_exc_handler:
.set noreorder
# Set Error LED and ExcCode LEDs
# Get Cause
mfc0 $26, $13
li $27, 0xC0000000
srl $26, 2
andi $26, 0x000F
or $26, $27
la $27, sys_led_port
sw $26, 0($27)
# wait for all interrupts = 0
$w4x: mfc0 $26, $13
nop
srl $26, 8
andi $26, 0xFF
bnez $26, $w4x
nop
# Get return address
mfc0 $26, $14
# Return
nop
jr $26
rfe
.set reorder
@@ -1,214 +0,0 @@
#include <sys/times.h>
#include <sys/time.h>
#include <sys/resource.h>
#include <sys/stat.h>
#include <errno.h>
#include <stdlib.h>
#include "libsys_boot.h"
// ---------------------------------------------------------------------------------
// MIPS specific
UINT32 CP0_SR_read(void)
{
UINT32 result;
__asm
(
"mfc0 %[val], $12\n"
: [val] "=r" (result)
);
return result;
}
void CP0_SR_write(UINT32 val)
{
__asm
(
"mtc0 %[val], $12\n"
: /* no output */
: [val] "r" (val)
);
}
UINT32 CP0_CR_read(void)
{
UINT32 result;
__asm
(
"mfc0 %[val], $13\n"
: [val] "=r" (result)
);
return result;
}
void CP0_CR_write(UINT32 val)
{
__asm
(
"mtc0 %[val], $13\n"
:
: [val] "r" (val)
);
}
UINT32 CP0_PRID_read(void)
{
UINT32 result;
__asm
(
"mfc0 %[val], $15\n"
: [val] "=r" (result)
);
return result;
}
// ---------------------------------------------------------------------------------
char readchar(void)
{
volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT;
volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA;
while(!(0x10 & *pUART_stat));
return (char)*pUART_data;
}
void writechar(char c)
{
volatile UINT32 *pUART_stat = (UINT32*)SYS_UART_STAT;
volatile UINT32 *pUART_data = (UINT32*)SYS_UART_DATA;
while((0x02 & *pUART_stat) != 0);
*pUART_data = (UINT32)c;
}
void _putchar(char c)
{
if (c == 0x0A)
{
writechar(0x0D);
}
writechar(c);
}
int sputs(char *pStr)
{
char *start;
start = pStr;
while(*pStr)
_putchar(*(pStr++));
return pStr - start;
}
void print_byte(char byte)
{
int i;
unsigned char c, nibble;
for (i=0; i < 2; i++)
{
nibble = (char)((byte >> 4) & 0xF);
byte <<= 4;
if (nibble < 10)
c = nibble + '0';
else
c = nibble + 'A' - 10;
_putchar(c);
}
}
void print_word(int word)
{
int i;
unsigned char c, nibble;
for (i=0; i < 4; i++)
{
c = (char) (word >> 24);
print_byte(c);
word <<= 8;
}
}
// ---------------------------------------------------------------------------------
// PrintBuffer8()
// Prints byte buffer as hex and ascii interpretation
// ---------------------------------------------------------------------------------
// _Parameters :
// pBuf: : IN: Buffer to display
// nbpr : Number of bytes per row to display
// len : Length of input buffer
// _Return: none
//
// ---------------------------------------------------------------------------
void PrintBuffer8(UINT8 *pBuf, int nbpr, int len)
{
memdump(pBuf, 1, nbpr, len);
}
void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len)
{
int i, j, cnt_hex, cnt_asc, base;
unsigned char c;
i = j = 0;
cnt_hex = len;
cnt_asc = len;
base = 0;
if (!print_offset_only)
base = (int)pBuf;
do
{
print_word(base + i);
sputs(": ");
for (j=0; j < num_bytes_per_row; j++)
{
if (cnt_hex)
{
print_byte(pBuf[i+j]);
sputs(" ");
cnt_hex--;
}
else
{
sputs(" ");
break;
}
}
sputs(" ");
for (j=0; j < num_bytes_per_row; j++)
{
if (cnt_asc)
{
c = pBuf[i+j];
if((c < 0x20) || (c > 0x7F))
c = '.';
_putchar(c);
cnt_asc--;
}
else
{
sputs(" ");
break;
}
}
sputs("\n");
i += num_bytes_per_row;
} while (cnt_hex);
}
@@ -1,54 +0,0 @@
#ifndef LIBSYS_H
#define LIBSYS_H
// ---------------------------------------------------------
// Types
// ---------------------------------------------------------
#define INT8 char
#define INT16 short
#define INT32 long
#define UINT8 unsigned char
#define UINT16 unsigned short
#define UINT32 unsigned long
#define INT int
#define UINT unsigned int
#define FLOAT32 float
#define FLOAT64 double
#define IS_ERROR(e) ((e & 0x80000000) == 0x80000000)
#define SYS_GPIO0 0xA0000000
#define SYS_GPIO1 0xA0000004
#define SYS_LED_PORT SYS_GPIO0
#define SYS_USB_CTRL SYS_GPIO1
#define SYS_TIMER_USEC 0xA0000008
#define SYS_TIMER_SEC 0xA000000C
#define SYS_UART_DATA 0xA0010000
#define SYS_UART_STAT 0xA0010004
#define SYS_UART_BAUD 0xA0010008
#define SYS_USB_DATA 0xA0020000
#define SYS_USB_MBX 0xA0020004
#define SYS_USB_ADDR 0xA0020008
#define SYS_USB_STATUS 0xA002000C
#define SYS_FLASH_IO 0xA4000000
#define SYS_FLASH_MEM 0x00000000
// MIPS specific
UINT32 CP0_SR_read(void);
void CP0_SR_write(UINT32 val);
UINT32 CP0_CR_read(void);
void CP0_CR_write(UINT32 val);
UINT32 CP0_PRID_read(void);
// General
char readchar(void);
void writechar(char c);
int write(int file, char *ptr, int len);
int sputs(char *pStr);
void print_byte(char byte);
void print_word(int word);
void PrintBuffer8(UINT8 *pBuf, int nbpr, int len);
void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len);
#endif // LIBSYS_H
@@ -1,43 +0,0 @@
.file "startup.S"
.text
.section .init,"ax"
.extern _init
.align 2
_start:
.set noreorder
# set stack pointer
la $sp, stack_ptr
# Set Kernel mode
li $26, 0x1040000C
mtc0 $26, $12
li $26, 0x00000000
mtc0 $26, $13
mfc0 $26, $15
nop
mtc0 $26, $31
# Invalidate I-Cache
cop0 32
# Invalidate D-Cache
cop0 34
# jump init
la $26, _init
jalr $26
nop
la $26, main
jalr $26
nop
_terminate:
nop
j _terminate
nop
.set reorder
-225
View File
@@ -1,225 +0,0 @@
/* Script for -z combreloc: combine and sort reloc sections */
OUTPUT_FORMAT("elf32-littlemips", "elf32-bigmips",
"elf32-littlemips")
OUTPUT_ARCH(mips)
ENTRY(_start)
SEARCH_DIR("./libsys");
SEARCH_DIR("/usr/local/mipsel-elf/lib:/usr/local/mipsel-elf/lib/eb");
SEARCH_DIR("/usr/local/lib/gcc/mipsel-elf/4.3.3:/usr/local/lib/gcc/mipsel-elf/4.3.3/eb");
stack_ptr = 0x7FFFEFF0;
baudrate = 0x0D;
sys_led_port = 0xA0000000;
sys_uart_data = 0xA0010000;
sys_uart_stat = 0xA0010004;
sys_uart_baud = 0xA0010008;
sys_timer_usec = 0xA000008;
sys_timer_sec = 0xA000000C;
STARTUP(startup.o)
INPUT(kernel.o)
SECTIONS
{
/* Read-only sections, merged into text segment: */
PROVIDE (__executable_start = 0x40000000); . = 0x40000000;
.start __executable_start :
{
start = ALIGN(2);
entry = ALIGN(2);
_entry = ALIGN(2);
__entry = ALIGN(2);
*(.start)
}
/* Kernel text with low-level exception handler */
.exc_vector __executable_start + 0x080 :
{
_exc_vect_start = .;
*(.exc_vect)
_exc_vect_end = .;
}
.init :
{
KEEP (*(.init))
} =0
.plt : { *(.plt) }
.text :
{
_ftext = . ;
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.mips16.fn.*) *(.mips16.call.*)
} =0
.fini :
{
KEEP (*(.fini))
} =0
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
.rodata1 : { *(.rodata1) }
.sdata2 :
{
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
}
.sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
.eh_frame_hdr : { *(.eh_frame_hdr) }
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
.gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) }
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */
. = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
/* Exception handling */
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
.gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
/* Thread Local Storage sections */
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
}
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
}
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
}
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
}
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
}
.jcr : { KEEP (*(.jcr)) }
.data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }
. = DATA_SEGMENT_RELRO_END (0, .);
.data :
{
_fdata = . ;
*(.data .data.* .gnu.linkonce.d.*)
SORT(CONSTRUCTORS)
}
.data1 : { *(.data1) }
.got.plt : { *(.got.plt) }
. = .;
_gp = ALIGN(16) + 0x7ff0;
.got : { *(.got) }
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
.sdata :
{
*(.sdata .sdata.* .gnu.linkonce.s.*)
}
.lit8 : { *(.lit8) }
.lit4 : { *(.lit4) }
_edata = .; PROVIDE (edata = .);
__bss_start = .;
_fbss = .;
.sbss :
{
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
}
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections.
FIXME: Why do we need it? When there is no .bss section, we don't
pad the .data section. */
. = ALIGN(. != 0 ? 32 / 8 : 1);
}
. = ALIGN(32 / 8);
. = ALIGN(32 / 8);
_end = .; PROVIDE (end = .);
. = DATA_SEGMENT_END (.);
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
.mdebug.abi32 : { KEEP(*(.mdebug.abi32)) }
.mdebug.abiN32 : { KEEP(*(.mdebug.abiN32)) }
.mdebug.abi64 : { KEEP(*(.mdebug.abi64)) }
.mdebug.abiO64 : { KEEP(*(.mdebug.abiO64)) }
.mdebug.eabi32 : { KEEP(*(.mdebug.eabi32)) }
.mdebug.eabi64 : { KEEP(*(.mdebug.eabi64)) }
.gcc_compiled_long32 : { KEEP(*(.gcc_compiled_long32)) }
.gcc_compiled_long64 : { KEEP(*(.gcc_compiled_long64)) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) }
}
-147
View File
@@ -1,147 +0,0 @@
*asm:
%{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} %{mips16} %{mno-mips16:-no-mips16} %{mips3d} %{mno-mips3d:-no-mips3d} %{mdmx} %{mno-mdmx:-no-mdmx} %{mdsp} %{mno-dsp} %{mdspr2} %{mno-dspr2} %{msmartmips} %{mno-smartmips} %{mmt} %{mno-mt} %{mfix-vr4120} %{mfix-vr4130} %(subtarget_asm_optimizing_spec) %(subtarget_asm_debugging_spec) %{mabi=*} %{!mabi*: %(asm_abi_default_spec)} %{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} %{mfp32} %{mfp64} %{mshared} %{mno-shared} %{msym32} %{mno-sym32} %{mtune=*} %{v} %(subtarget_asm_spec)
*asm_debug:
%{gstabs*:--gstabs}%{!gstabs*:%{g*:--gdwarf2}} %{fdebug-prefix-map=*:--debug-prefix-map %*}
*asm_final:
*asm_options:
%{--target-help:%:print-asm-header()} %a %Y %{c:%W{o*}%{!o*:-o %w%b%O}}%{!c:-o %d%w%u%O}
*invoke_as:
%{!S:-o %|.s |
as %(asm_options) %m.s %A }
*cpp:
%(subtarget_cpp_spec)
*cpp_options:
%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w} %{f*} %{g*:%{!g0:%{!fno-working-directory:-fworking-directory}}} %{O*} %{undef} %{save-temps:-fpch-preprocess}
*cpp_debug_options:
%{d*}
*cpp_unique_options:
%{C|CC:%{!E:%eGCC does not support -C or -CC without -E}} %{!Q:-quiet} %{nostdinc*} %{C} %{CC} %{v} %{I*&F*} %{P} %I %{MD:-MD %{!o:%b.d}%{o*:%.d%*}} %{MMD:-MMD %{!o:%b.d}%{o*:%.d%*}} %{M} %{MM} %{MF*} %{MG} %{MP} %{MQ*} %{MT*} %{!E:%{!M:%{!MM:%{!MT:%{!MQ:%{MD|MMD:%{o*:-MQ %*}}}}}}} %{remap} %{g3|ggdb3|gstabs3|gcoff3|gxcoff3|gvms3:-dD} %{H} %C %{D*&U*&A*} %{i*} %Z %i %{fmudflap:-D_MUDFLAP -include mf-runtime.h} %{fmudflapth:-D_MUDFLAP -D_MUDFLAPTH -include mf-runtime.h} %{E|M|MM:%W{o*}}
*trad_capable_cpp:
cc1 -E %{traditional|ftraditional|traditional-cpp:-traditional-cpp}
*cc1:
%{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} %{save-temps: } %(subtarget_cc1_spec)
*cc1_options:
%{pg:%{fomit-frame-pointer:%e-pg and -fomit-frame-pointer are incompatible}} %1 %{!Q:-quiet} -dumpbase %B %{d*} %{m*} %{a*} %{c|S:%{o*:-auxbase-strip %*}%{!o*:-auxbase %b}}%{!c:%{!S:-auxbase %b}} %{g*} %{O*} %{W*&pedantic*} %{w} %{std*&ansi&trigraphs} %{v:-version} %{pg:-p} %{p} %{f*} %{undef} %{Qn:-fno-ident} %{--help:--help} %{--target-help:--target-help} %{--help=*:--help=%(VALUE)} %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %b.s}}} %{fsyntax-only:-o %j} %{-param*} %{fmudflap|fmudflapth:-fno-builtin -fno-merge-constants} %{coverage:-fprofile-arcs -ftest-coverage}
*cc1plus:
*link_gcc_c_sequence:
%G %L %G
*link_ssp:
%{fstack-protector|fstack-protector-all:-lssp_nonshared -lssp}
*endfile:
crtend%O%s crtn%O%s
*link:
%(endian_spec) %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} %{bestGnum} %{shared} %{non_shared}
*lib:
--start-group %o -lc --end-group
*mfwrap:
%{static: %{fmudflap|fmudflapth: --wrap=malloc --wrap=free --wrap=calloc --wrap=realloc --wrap=mmap --wrap=munmap --wrap=alloca} %{fmudflapth: --wrap=pthread_create}} %{fmudflap|fmudflapth: --wrap=main}
*mflib:
%{fmudflap|fmudflapth: -export-dynamic}
*link_gomp:
*libgcc:
-lgcc
*startfile:
crti%O%s crtbegin%O%s
*switches_need_spaces:
*cross_compile:
1
*version:
4.3.3
*multilib:
. !msoft-float !EL !EB;soft-float msoft-float !EL !EB;el !msoft-float EL !EB;eb !msoft-float !EL EB;soft-float/el msoft-float EL !EB;soft-float/eb msoft-float !EL EB;
*multilib_defaults:
EL mips1 mabi=32
*multilib_extra:
*multilib_matches:
mel EL;meb EB;m4650 msingle-float;msoft-float msoft-float;EL EL;EB EB;
*multilib_exclusions:
*multilib_options:
msoft-float EL/EB
*linker:
collect2
*link_libgcc:
%D
*md_exec_prefix:
*md_startfile_prefix:
*md_startfile_prefix_1:
*startfile_prefix_spec:
*sysroot_spec:
--sysroot=%R
*sysroot_suffix_spec:
*sysroot_hdrs_suffix_spec:
*subtarget_cc1_spec:
*subtarget_cpp_spec:
*subtarget_asm_optimizing_spec:
%{noasmopt:-O0} %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}}
*subtarget_asm_debugging_spec:
%{g} %{g0} %{g1} %{g2} %{g3} %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} %{gcoff*:-mdebug} %{!gcoff*:-no-mdebug}
*subtarget_asm_spec:
*asm_abi_default_spec:
-mabi=32
*endian_spec:
%{!EB:%{!meb:-EL}} %{EB|meb:-EB}
*link_command:
%{!fsyntax-only:%{!c:%{!M:%{!MM:%{!E:%{!S: %(linker) -T link/link.ld %l %{pie:-pie} %X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r} %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:} %{L*} %(mfwrap) %(link_libgcc) %{lib} %{fopenmp|ftree-parallelize-loops=*:%:include(libgomp.spec)%(link_gomp)} %(mflib) %{fprofile-arcs|fprofile-generate|coverage:-lgcov} %{!nostdlib:%{!nodefaultlibs:%(link_ssp) %(link_gcc_c_sequence)}} %{!A:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} }}}}}}
-260
View File
@@ -1,260 +0,0 @@
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider {TOP interface}
add wave -noupdate -format Logic /tb_mips_top/nmi
add wave -noupdate -format Logic /tb_mips_top/rst
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal /tb_mips_top/debug
add wave -noupdate -format Logic /tb_mips_top/stb_o
add wave -noupdate -format Logic /tb_mips_top/ack_i
add wave -noupdate -format Logic /tb_mips_top/srdy_i
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/addr_o
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dat_i
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dat_o
add wave -noupdate -format Logic /tb_mips_top/we_o
add wave -noupdate -format Literal /tb_mips_top/sel_o
add wave -noupdate -format Logic /tb_mips_top/cyc_o
add wave -noupdate -format Logic /tb_mips_top/mrdy_o
add wave -noupdate -format Literal /tb_mips_top/int
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_shifter/dout
add wave -noupdate -format Logic /tb_mips_top/uut/biu_rst
add wave -noupdate -format Logic /tb_mips_top/uut/cpu_rst
add wave -noupdate -format Logic /tb_mips_top/uut/cpu_run
add wave -noupdate -divider BIU
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/bout_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/bout_fifo_dout
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bout_fifo_re
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bout_fifo_we
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bout_fifo_full
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bout_fifo_empty
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bout_rdy
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/bus_timeout_cnt
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bus_timeout
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_imem_err
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_imem_rdy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_imem_en
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/cpu_imem_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/cpu_imem_din
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_dmem_err
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_dmem_rdy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_dmem_en
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/cpu_dmem_we
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/cpu_dmem_be
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/cpu_dmem_dout
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/cpu_dmem_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/cpu_dmem_addr
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bus_idle
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/busy
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/dmem_be
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/bin_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/bin_fifo_dout
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bin_fifo_re
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bin_fifo_we
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bin_fifo_full
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/bin_fifo_empty
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/write_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/write_fifo_dout
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/write_fifo_re
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/write_fifo_we
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/write_fifo_full
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/write_fifo_empty
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/read_cycle
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcached
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcache_en2
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/dcache_en
add wave -noupdate -divider {External components}
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/gpi_0
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/gpo_0
add wave -noupdate -format Logic /tb_mips_top/inst_uart/tx_complete
add wave -noupdate -format Logic /tb_mips_top/inst_uart/tx_empty
add wave -noupdate -format Literal /tb_mips_top/inst_uart/uart_status_port
add wave -noupdate -format Logic /tb_mips_top/rx
add wave -noupdate -format Logic /tb_mips_top/tx
add wave -noupdate -divider {Interrupt Timer}
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/inst_gpio/timer_cnt
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/inst_gpio/timer_cmp
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_en
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_inten
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_irq
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_ovl
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_irq_ack
add wave -noupdate -format Literal /tb_mips_top/inst_gpio/timer_cmp_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/inst_gpio/reg_data_wr
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal /tb_mips_top/mem_area
add wave -noupdate -format Literal /tb_mips_top/inst_flash_port/s
add wave -noupdate -format Logic /tb_mips_top/inst_flash_port/ack
add wave -noupdate -format Logic /tb_mips_top/stb_o
add wave -noupdate -format Logic /tb_mips_top/srdy_i
add wave -noupdate -format Logic /tb_mips_top/we_o
add wave -noupdate -format Logic /tb_mips_top/inst_flash_port/we_i_r
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/addr_o
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/inst_flash_port/addr_i_r
add wave -noupdate -format Logic /tb_mips_top/inst_flash_port/page_mode_en
add wave -noupdate -format Logic /tb_mips_top/inst_flash_port/rdy
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/flash_a
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/flash_d
add wave -noupdate -format Logic /tb_mips_top/ack_i
add wave -noupdate -format Logic /tb_mips_top/flash_cs_n
add wave -noupdate -format Logic /tb_mips_top/flash_we_n
add wave -noupdate -format Logic /tb_mips_top/flash_oe_n
add wave -noupdate -format Literal /tb_mips_top/flash_be_n
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/sram_a
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/sram_d
add wave -noupdate -format Logic /tb_mips_top/ack_i
add wave -noupdate -format Logic /tb_mips_top/sram_cs_n
add wave -noupdate -format Literal /tb_mips_top/sram_wr_n
add wave -noupdate -format Logic /tb_mips_top/sram_oe_n
add wave -noupdate -format Literal /tb_mips_top/sram_be_n
add wave -noupdate -format Logic /tb_mips_top/inst_sram_port/page_mode_en_r
add wave -noupdate -format Logic /tb_mips_top/inst_sram_port/do_page_read
add wave -noupdate -format Logic /tb_mips_top/inst_sram_port/rdy
add wave -noupdate -format Literal /tb_mips_top/inst_sram_port/s
add wave -noupdate -divider ALU
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/hdu
add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/sdu
add wave -noupdate -divider PC
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/pc
add wave -noupdate -divider COP0
add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/ir_en
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/ir
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/test_reg
add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/test_reg_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/icache_info
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/dcache_info
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cop_pipe_id
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cop_pipe_ex
add wave -noupdate -format Literal /tb_mips_top/uut/inst_cop/ctrl_in
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_en
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/ctrl_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/epc
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/cause
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/status
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_cop/badvaddr
add wave -noupdate -format Literal /tb_mips_top/uut/inst_cop/eflags
add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/status_save
add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/status_rest
add wave -noupdate -format Logic /tb_mips_top/uut/inst_cop/stat_reg_we
add wave -noupdate -format Literal /tb_mips_top/uut/inst_cop/exc_state
add wave -noupdate -divider Pipestages
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/id_stage
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/ex_stage
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Logic -label .stall_all /tb_mips_top/uut/inst_pipeline/sdu.stall_all
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/mem_stage
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/wb_stage
add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/rst
add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/cpu_run
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_reg_dual/reg_mem
add wave -noupdate -divider I-Cache
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/ctrl
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_en
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_req
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_rdy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_hit
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_match
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_req_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/request_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/fill_addr
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/request_count
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/flush_count
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/fill_count
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/pv_reg
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/pv
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/cs
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/s
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cache_entry_out
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_ram_re
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/data_ram_re
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_b_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_b_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_a_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/data_a_din
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/data_ram_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_a_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_b_din
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_ram_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/inst_tag_ram/ram
add wave -noupdate -divider D-Cache
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/dcache_dbg
add wave -noupdate -format Logic /tb_mips_top/clk
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/mrdy_o
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_en
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_busy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_bsy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_req
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_be
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_hit_we
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/instant_raw
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_req_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_data_reg
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/request_addr
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/request_count
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/fill_addr
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/fill_count
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/flush_count
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_rdy
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_hit
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_match
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/pv_reg
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/pv
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/s
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cs
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/dat_i
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_in
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_out
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_data_reg
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_be_reg
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_we_reg
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_a_din
add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/data_b_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_b_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_b_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_a_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_a_addr
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_din
add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_ram_we
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {Cursor {1309445000 ps} 0}
configure wave -namecolwidth 188
configure wave -valuecolwidth 154
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 100
configure wave -griddelta 40
configure wave -timeline 1
update
WaveRestoreZoom {0 ps} {1575 us}