348 lines
11 KiB
C
348 lines
11 KiB
C
#ifndef LIBSYS_H
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#define LIBSYS_H
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#include <stdint.h>
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// ---------------------------------------------------------
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// Types
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// ---------------------------------------------------------
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#define NO_ERROR LSYS_SUCCESS
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#define ERROR LSYS_ERR_BASE
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#define LSYS_SUCCESS 0
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#define LSYS_ERR_BASE 0x80000000
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#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE)
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// ---------------------------------------------------------
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// IRQs
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// ---------------------------------------------------------
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#define SYS_INT_TIMER 7
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#define SYS_INT_PS2 6
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#define SYS_INT_EMAC 6
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#define SYS_INT_VGA 5
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#define SYS_INT_AC97 5
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#define SYS_INT_USB 4
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#define SYS_INT_UART 3
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#define SYS_INT_DBG 2
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#define SYS_INT_SOFT_1 1
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#define SYS_INT_SOFT_0 0
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// ---------------------------------------------------------
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// Memory-mapped registers
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// ---------------------------------------------------------
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#ifndef SYS_IO_BASE
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#define SYS_IO_BASE 0xA0000000
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#endif
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#ifndef SDRAM_BASE
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#define SDRAM_BASE 0x40000000
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#endif
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#ifndef FLASH_BASE_IO
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#define FLASH_BASE_IO 0xA4000000
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#endif
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#ifndef FLASH_BASE_MEM
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#define FLASH_BASE_MEM 0x00000000
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#endif
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// Backwards compatibility
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#define SYS_FLASH_IO FLASH_BASE_IO
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#define SYS_FLASH_MEM FLASH_BASE_MEM
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// GPIO
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#define SYS_GPIO_0_BASE (SYS_IO_BASE + 0)
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#define SYS_GPIO_0_DATA (SYS_GPIO_0_BASE + 0)
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#define SYS_GPIO_0_DIR (SYS_GPIO_0_BASE + 4)
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#define GPIO_0_DFLT_DIR 0x00000000 // Inputs
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#define GPIO_0_DFLT_DATA 0x00000000
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#define GPIO_0_MASK_LED 0x000001FF
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#define GPIO_0_ALIGN_LED 0
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#define GPIO_0_MASK_USB 0x00000003
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#define GPIO_0_ALIGN_USB 12
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#define GPIO_0_USB_RST 0x00000001
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#define GPIO_0_USB_INTEN 0x00000002
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#define GPIO_0_MASK_AC97 0x00000001
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#define GPIO_0_ALIGN_AC97 15
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#define GPIO_0_AC97_INTEN 0x00000001
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#define GPIO_0_MASK_DIP 0x000000FF
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#define GPIO_0_ALIGN_DIP 16
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#define GPIO_0_MASK_BTN 0x0000001F
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#define GPIO_0_ALIGN_BTN 24
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#define GPIO_0_MASK_MDIO 0x00000007
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#define GPIO_0_ALIGN_MDIO 29
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#define GPIO_0_MDIO_INTEN 0x00000001 // ToDo: better grouping
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#define GPIO_0_MDIO_RST 0x00000001
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#define GPIO_0_MDIO_MDC 0x00000002
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#define GPIO_0_MDIO_MDIO 0x00000004
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// RTC
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#define SYS_TIMER_USEC (SYS_IO_BASE + 0x8)
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#define SYS_TIMER_SEC (SYS_IO_BASE + 0xC)
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// TIMERs
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#define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18)
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#define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C)
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#define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20)
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#define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24)
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#define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28)
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#define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C)
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#define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30)
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#define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34)
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#define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38)
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#define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C)
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// UARTs
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#define SYS_UART_BIT_TX_HALFFULL 0x00000001
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#define SYS_UART_BIT_TX_FULL 0x00000002
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#define SYS_UART_BIT_RX_HALFFULL 0x00000004
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#define SYS_UART_BIT_RX_FULL 0x00000008
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#define SYS_UART_BIT_RX_AVAIL 0x00000010
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#define SYS_UART_BIT_TX_INTEN 0x00000020
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#define SYS_UART_BIT_RX_INTEN 0x00000040
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#define SYS_UART_BIT_TX_IRQ 0x00000100
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#define SYS_UART_BIT_RX_IRQ 0x00000200
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#define SYS_UART_DATA SYS_UART0_DATA
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#define SYS_UART_STAT SYS_UART0_STAT
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#define SYS_UART_BAUD SYS_UART0_BAUD
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#define SYS_UART0_DATA (SYS_IO_BASE + 0x10000)
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#define SYS_UART0_STAT (SYS_IO_BASE + 0x10004)
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#define SYS_UART0_BAUD (SYS_IO_BASE + 0x10008)
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#define SYS_UART1_DATA (SYS_IO_BASE + 0x10100)
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#define SYS_UART1_STAT (SYS_IO_BASE + 0x10104)
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#define SYS_UART1_BAUD (SYS_IO_BASE + 0x10108)
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// PS2s
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#define SYS_PS2_BIT_TX_EMPTY 0x00000001
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#define SYS_PS2_BIT_RX_AVAIL 0x00000004
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#define SYS_PS2_BIT_PIN_CLOCK 0x00000008
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#define SYS_PS2_BIT_PIN_DATA 0x00000010
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#define SYS_PS2_BIT_TX_INTEN 0x00000020
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#define SYS_PS2_BIT_RX_INTEN 0x00000040
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#define SYS_PS2_BIT_TX_IRQ 0x00000100
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#define SYS_PS2_BIT_RX_IRQ 0x00000200
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#define SYS_PS2_BIT_RX_ERR_PAR 0x00000800
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#define SYS_PS2_BIT_RX_ERR_FLAG 0x00008000
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#define SYS_PS2_0_DATA (SYS_IO_BASE + 0x10200)
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#define SYS_PS2_0_STAT (SYS_IO_BASE + 0x10204)
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#define SYS_PS2_1_DATA (SYS_IO_BASE + 0x10300)
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#define SYS_PS2_1_STAT (SYS_IO_BASE + 0x10304)
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// USB
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#define SYS_USB_DATA (SYS_IO_BASE + 0x20000)
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#define SYS_USB_MBX (SYS_IO_BASE + 0x20004)
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#define SYS_USB_ADDR (SYS_IO_BASE + 0x20008)
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#define SYS_USB_STATUS (SYS_IO_BASE + 0x2000C)
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// VGA
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#define SYS_VGA_CTRL (SYS_IO_BASE + 0x30000) // R/W
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#define SYS_VGA_BIT_CGRDY 0x00000001 // RO
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#define SYS_VGA_BIT_MSTEN 0x00000002 // R/W
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#define SYS_VGA_BIT_BUFCHG_INTEN 0x00000004 // RO
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#define SYS_VGA_BIT_BUFCHG_FLAG 0x00000008 // RO
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#define SYS_VGA_BIT_CLRSCR 0x00000010 // WO
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#define SYS_VGA_BIT_CLRLINE 0x00000020 // WO
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#define SYS_VGA_BIT_BLIT_REQ 0x00000100 // R/W
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#define SYS_VGA_BIT_BLIT_BSY 0x00000100 // R/W
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#define SYS_VGA_BIT_BLIT_FIN 0x00000200 // R/W
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#define SYS_VGA_BIT_BLIT_FIN_ACK 0x00000200 // R/W
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#define SYS_VGA_BIT_BLIT_FIN_INTEN 0x00000400 // R/W
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#define SYS_VGA_BIT_BLIT_EMPTY 0x00000800 // R/W
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#define SYS_VGA_BIT_BLIT_EMPTY_ACK 0x00000800 // R/W
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#define SYS_VGA_BIT_BLIT_EMPTY_INTEN 0x00001000 // R/W
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#define SYS_VGA_BIT_BLIT_OP_CONSTCOL 0x00010000 // R/W
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#define SYS_VGA_BIT_BLIT_ACTIVE 0x80000000 // RO
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#define SYS_VGA_ASCII (SYS_IO_BASE + 0x30004) // R/W
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#define SYS_VGA_POSX (SYS_IO_BASE + 0x30008) // R/W
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#define SYS_VGA_POSY (SYS_IO_BASE + 0x3000C) // R/W
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#define SYS_VGA_CGCOL (SYS_IO_BASE + 0x30010) // R/W
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#define SYS_VGA_RES (SYS_IO_BASE + 0x30014) // RO
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#define SYS_VGA_FB_FRONT (SYS_IO_BASE + 0x30018) // R/W
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#define SYS_VGA_FB_BACK (SYS_IO_BASE + 0x3001C) // R/W
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#define SYS_VGA_BLIT_SRC0_ADDR (SYS_IO_BASE + 0x30020) // R/W
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#define SYS_VGA_BLIT_SRC0_DIMX (SYS_IO_BASE + 0x30024) // R/W
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#define SYS_VGA_BLIT_SRC1_ADDR (SYS_IO_BASE + 0x30030) // R/W
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#define SYS_VGA_BLIT_SRC1_DIMX (SYS_IO_BASE + 0x30034) // R/W
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#define SYS_VGA_BLIT_DST_ADDR (SYS_IO_BASE + 0x30040) // R/W
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#define SYS_VGA_BLIT_DST_DIMX (SYS_IO_BASE + 0x30044) // R/W
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#define SYS_VGA_BLIT_NX (SYS_IO_BASE + 0x30050) // R/W
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#define SYS_VGA_BLIT_NY (SYS_IO_BASE + 0x30054) // R/W
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#define SYS_VGA_BLIT_COLOR (SYS_IO_BASE + 0x30058) // R/W
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// AC'97
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#define SYS_AC97_STAT (SYS_IO_BASE + 0x40000)
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#define SYS_AC97_CTRL (SYS_IO_BASE + 0x40000)
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#define SYS_AC97_ACSTAT (SYS_IO_BASE + 0x40400)
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#define SYS_AC97_ACCTRL (SYS_IO_BASE + 0x40600)
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#define SYS_AC97_PCM (SYS_IO_BASE + 0x40800)
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#define SYS_AC97_WAVIN SYS_AC97_PCM
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#define SYS_AC97_WAVOUT SYS_AC97_PCM
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// Ethernet MAC
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#define SYS_EMAC_RX_CTRL (SYS_IO_BASE + 0x50000)
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#define EMAC_RX_CTRL_RESET (1 << 31)
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#define EMAC_RX_CTRL_GIGABIT (1 << 30)
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#define EMAC_RX_CTRL_FCS_CHECK (1 << 29)
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#define EMAC_RX_CTRL_PROMISCIOUS (1 << 23)
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#define EMAC_RX_CTRL_PKT_REQ (1 << 17)
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#define EMAC_RX_CTRL_PKT_FREE (1 << 16)
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#define EMAC_RX_CTRL_INTEN (1 << 4)
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#define SYS_EMAC_RX_STAT SYS_EMAC_RX_CTRL
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#define EMAC_RX_STAT_RESET (1 << 31)
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#define EMAC_RX_STAT_GIGABIT (1 << 30)
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#define EMAC_RX_STAT_FCS_CHECK (1 << 29)
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#define EMAC_RX_STAT_PROMISCIOUS (1 << 23)
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#define EMAC_RX_STAT_PKT_BCAST (1 << 19)
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#define EMAC_RX_STAT_PKT_MACOK (1 << 18)
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#define EMAC_RX_STAT_PKT_VALID (1 << 17)
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#define EMAC_RX_STAT_PKT_AVAIL (1 << 16)
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#define EMAC_RX_STAT_INTEN (1 << 4)
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#define SYS_EMAC_RX_SIZE (SYS_IO_BASE + 0x50004)
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#define SYS_EMAC_TX_CTRL (SYS_IO_BASE + 0x50008)
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#define EMAC_TX_CTRL_RESET (1 << 31)
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#define EMAC_TX_CTRL_GIGABIT (1 << 30)
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#define EMAC_TX_CTRL_FCS_APPEND (1 << 29)
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#define EMAC_TX_CTRL_PKT_ALLOC (1 << 17)
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#define EMAC_TX_CTRL_PKT_COMMIT (1 << 16)
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#define EMAC_TX_CTRL_INTEN (1 << 4)
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#define SYS_EMAC_TX_STAT SYS_EMAC_TX_CTRL
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#define EMAC_TX_STAT_RESET (1 << 31)
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#define EMAC_TX_STAT_GIGABIT (1 << 30)
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#define EMAC_TX_STAT_FCS_APPEND (1 << 29)
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#define EMAC_TX_STAT_PKT_DONE (1 << 24)
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#define EMAC_TX_STAT_PKT_ALLOC_BSY (1 << 17)
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#define EMAC_TX_STAT_PKT_ARMED (1 << 16)
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#define EMAC_TX_STAT_INTEN (1 << 4)
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#define SYS_EMAC_TX_SIZE (SYS_IO_BASE + 0x5000C)
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#define SYS_EMAC_MADDR (SYS_IO_BASE + 0x50018)
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#define SYS_EMAC_MADDR_0 SYS_EMAC_MADDR_0
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#define SYS_EMAC_MADDR_1 (SYS_IO_BASE + 0x5001C)
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#define SYS_EMAC_DATA (SYS_IO_BASE + 0x58000)
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#define SYS_EMAC_RX_DATA SYS_EMAC_DATA
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#define SYS_EMAC_TX_DATA SYS_EMAC_DATA
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#define SYS_EMAC_DATA_CACHED (SYS_IO_BASE + 0x10008000)
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// Sync. SRAM
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#define SYS_SSRAM_IO 0xA8000000
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// ---------------------------------------------------------
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// Chip registers
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// ---------------------------------------------------------
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// COP0 registers
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#define COP0_REG_INVAT_POINTER 31
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// COP0 instructions
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#define COP0_INSTR_INVALL_ICACHE 32
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#define COP0_INSTR_INVAT_ICACHE 33
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#define COP0_INSTR_INVALL_DCACHE 34
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#define COP0_INSTR_INVAT_DCACHE 35
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#define CP0_read(idx) \
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({ \
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uint32_t result; \
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__asm__ __volatile__ \
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( \
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"mfc0\t%0,$"#idx"\n" \
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: "=r" (result) \
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); \
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result; \
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})
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#define CP0_write(idx, val) \
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({ \
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__asm__ __volatile__ \
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( \
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"mtc0\t%0,$"#idx"\n" \
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"nop\n" \
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: /* no output */ \
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: "r" (val) \
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); \
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})
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#define CP0_TLBR \
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({ \
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__asm__ __volatile__ \
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( \
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"tlbr\n" \
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: /* no output */ \
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: /* no input */ \
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); \
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})
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#define CP0_TLBWI \
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({ \
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__asm__ __volatile__ \
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( \
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"tlbwi\n" \
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: /* no output */ \
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: /* no input */ \
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); \
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})
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uint32_t CP0_SR_read(void);
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void CP0_SR_write(uint32_t val);
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uint32_t CP0_CR_read(void);
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void CP0_CR_write(uint32_t val);
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uint32_t CP0_PRID_read(void);
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uint32_t CP0_TR_read(void);
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void CP0_TR_write(uint32_t val);
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void CP0_TR_write_ptr(uint32_t* pPtr);
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void CP0_TR_read_ptr(uint32_t* pPtr);
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void ICACHE_invalidate_all(void);
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void ICACHE_invalidate_at(uint32_t* pPtr);
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void DCACHE_invalidate_all(void);
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void DCACHE_invalidate_at(uint32_t* pPtr);
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#define CALC_BAUD(b) \
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((uint32_t)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1);
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#define UART0_setbaud(b) \
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*((uint32_t*)SYS_UART0_BAUD) = CALC_BAUD(b);
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#define UART1_setbaud(b) \
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*((uint32_t*)SYS_UART1_BAUD) = CALC_BAUD(b);
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#define UART2_setbaud(b) \
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*((uint32_t*)SYS_UART2_BAUD) = CALC_BAUD(b);
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char readchar(uint32_t port);
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void writechar(uint32_t port, char c);
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int write(int file, char *ptr, int len);
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int sputs(char const *pStr);
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void print_byte(char byte);
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void print_word(int word);
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void _exit (int exitcode);
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void sleep(unsigned ms);
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void usleep(unsigned us);
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char _getchar(void);
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void PrintBuffer8(uint8_t *pBuf, int nbpr, int len);
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void memdump(uint8_t *pBuf, int print_offset_only, int num_bytes_per_row, int len);
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void Screen_clr(void);
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void Screen_line_clr(void);
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void Screen_csr_set_x(uint32_t coord);
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void Screen_csr_set_y(uint32_t coord);
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uint32_t Screen_get_resx(void);
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uint32_t Screen_get_resy(void);
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uint32_t Screen_get_fps(void);
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#endif // LIBSYS_H
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