#ifndef LIBSYS_H #define LIBSYS_H #include // --------------------------------------------------------- // Types // --------------------------------------------------------- #define NO_ERROR LSYS_SUCCESS #define ERROR LSYS_ERR_BASE #define LSYS_SUCCESS 0 #define LSYS_ERR_BASE 0x80000000 #define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE) // --------------------------------------------------------- // IRQs // --------------------------------------------------------- #define SYS_INT_TIMER 7 #define SYS_INT_PS2 6 #define SYS_INT_EMAC 6 #define SYS_INT_VGA 5 #define SYS_INT_AC97 5 #define SYS_INT_USB 4 #define SYS_INT_UART 3 #define SYS_INT_DBG 2 #define SYS_INT_SOFT_1 1 #define SYS_INT_SOFT_0 0 // --------------------------------------------------------- // Memory-mapped registers // --------------------------------------------------------- #ifndef SYS_IO_BASE #define SYS_IO_BASE 0xA0000000 #endif #ifndef SDRAM_BASE #define SDRAM_BASE 0x40000000 #endif #ifndef FLASH_BASE_IO #define FLASH_BASE_IO 0xA4000000 #endif #ifndef FLASH_BASE_MEM #define FLASH_BASE_MEM 0x00000000 #endif // Backwards compatibility #define SYS_FLASH_IO FLASH_BASE_IO #define SYS_FLASH_MEM FLASH_BASE_MEM // GPIO #define SYS_GPIO_0_BASE (SYS_IO_BASE + 0) #define SYS_GPIO_0_DATA (SYS_GPIO_0_BASE + 0) #define SYS_GPIO_0_DIR (SYS_GPIO_0_BASE + 4) #define GPIO_0_DFLT_DIR 0x00000000 // Inputs #define GPIO_0_DFLT_DATA 0x00000000 #define GPIO_0_MASK_LED 0x000001FF #define GPIO_0_ALIGN_LED 0 #define GPIO_0_MASK_USB 0x00000003 #define GPIO_0_ALIGN_USB 12 #define GPIO_0_USB_RST 0x00000001 #define GPIO_0_USB_INTEN 0x00000002 #define GPIO_0_MASK_AC97 0x00000001 #define GPIO_0_ALIGN_AC97 15 #define GPIO_0_AC97_INTEN 0x00000001 #define GPIO_0_MASK_DIP 0x000000FF #define GPIO_0_ALIGN_DIP 16 #define GPIO_0_MASK_BTN 0x0000001F #define GPIO_0_ALIGN_BTN 24 #define GPIO_0_MASK_MDIO 0x00000007 #define GPIO_0_ALIGN_MDIO 29 #define GPIO_0_MDIO_INTEN 0x00000001 // ToDo: better grouping #define GPIO_0_MDIO_RST 0x00000001 #define GPIO_0_MDIO_MDC 0x00000002 #define GPIO_0_MDIO_MDIO 0x00000004 // RTC #define SYS_TIMER_USEC (SYS_IO_BASE + 0x8) #define SYS_TIMER_SEC (SYS_IO_BASE + 0xC) // TIMERs #define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18) #define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C) #define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20) #define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24) #define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28) #define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C) #define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30) #define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34) #define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38) #define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C) // UARTs #define SYS_UART_BIT_TX_HALFFULL 0x00000001 #define SYS_UART_BIT_TX_FULL 0x00000002 #define SYS_UART_BIT_RX_HALFFULL 0x00000004 #define SYS_UART_BIT_RX_FULL 0x00000008 #define SYS_UART_BIT_RX_AVAIL 0x00000010 #define SYS_UART_BIT_TX_INTEN 0x00000020 #define SYS_UART_BIT_RX_INTEN 0x00000040 #define SYS_UART_BIT_TX_IRQ 0x00000100 #define SYS_UART_BIT_RX_IRQ 0x00000200 #define SYS_UART_DATA SYS_UART0_DATA #define SYS_UART_STAT SYS_UART0_STAT #define SYS_UART_BAUD SYS_UART0_BAUD #define SYS_UART0_DATA (SYS_IO_BASE + 0x10000) #define SYS_UART0_STAT (SYS_IO_BASE + 0x10004) #define SYS_UART0_BAUD (SYS_IO_BASE + 0x10008) #define SYS_UART1_DATA (SYS_IO_BASE + 0x10100) #define SYS_UART1_STAT (SYS_IO_BASE + 0x10104) #define SYS_UART1_BAUD (SYS_IO_BASE + 0x10108) // PS2s #define SYS_PS2_BIT_TX_EMPTY 0x00000001 #define SYS_PS2_BIT_RX_AVAIL 0x00000004 #define SYS_PS2_BIT_PIN_CLOCK 0x00000008 #define SYS_PS2_BIT_PIN_DATA 0x00000010 #define SYS_PS2_BIT_TX_INTEN 0x00000020 #define SYS_PS2_BIT_RX_INTEN 0x00000040 #define SYS_PS2_BIT_TX_IRQ 0x00000100 #define SYS_PS2_BIT_RX_IRQ 0x00000200 #define SYS_PS2_BIT_RX_ERR_PAR 0x00000800 #define SYS_PS2_BIT_RX_ERR_FLAG 0x00008000 #define SYS_PS2_0_DATA (SYS_IO_BASE + 0x10200) #define SYS_PS2_0_STAT (SYS_IO_BASE + 0x10204) #define SYS_PS2_1_DATA (SYS_IO_BASE + 0x10300) #define SYS_PS2_1_STAT (SYS_IO_BASE + 0x10304) // USB #define SYS_USB_DATA (SYS_IO_BASE + 0x20000) #define SYS_USB_MBX (SYS_IO_BASE + 0x20004) #define SYS_USB_ADDR (SYS_IO_BASE + 0x20008) #define SYS_USB_STATUS (SYS_IO_BASE + 0x2000C) // VGA #define SYS_VGA_CTRL (SYS_IO_BASE + 0x30000) // R/W #define SYS_VGA_BIT_CGRDY 0x00000001 // RO #define SYS_VGA_BIT_MSTEN 0x00000002 // R/W #define SYS_VGA_BIT_BUFCHG_INTEN 0x00000004 // RO #define SYS_VGA_BIT_BUFCHG_FLAG 0x00000008 // RO #define SYS_VGA_BIT_CLRSCR 0x00000010 // WO #define SYS_VGA_BIT_CLRLINE 0x00000020 // WO #define SYS_VGA_BIT_BLIT_REQ 0x00000100 // R/W #define SYS_VGA_BIT_BLIT_BSY 0x00000100 // R/W #define SYS_VGA_BIT_BLIT_FIN 0x00000200 // R/W #define SYS_VGA_BIT_BLIT_FIN_ACK 0x00000200 // R/W #define SYS_VGA_BIT_BLIT_FIN_INTEN 0x00000400 // R/W #define SYS_VGA_BIT_BLIT_EMPTY 0x00000800 // R/W #define SYS_VGA_BIT_BLIT_EMPTY_ACK 0x00000800 // R/W #define SYS_VGA_BIT_BLIT_EMPTY_INTEN 0x00001000 // R/W #define SYS_VGA_BIT_BLIT_OP_CONSTCOL 0x00010000 // R/W #define SYS_VGA_BIT_BLIT_ACTIVE 0x80000000 // RO #define SYS_VGA_ASCII (SYS_IO_BASE + 0x30004) // R/W #define SYS_VGA_POSX (SYS_IO_BASE + 0x30008) // R/W #define SYS_VGA_POSY (SYS_IO_BASE + 0x3000C) // R/W #define SYS_VGA_CGCOL (SYS_IO_BASE + 0x30010) // R/W #define SYS_VGA_RES (SYS_IO_BASE + 0x30014) // RO #define SYS_VGA_FB_FRONT (SYS_IO_BASE + 0x30018) // R/W #define SYS_VGA_FB_BACK (SYS_IO_BASE + 0x3001C) // R/W #define SYS_VGA_BLIT_SRC0_ADDR (SYS_IO_BASE + 0x30020) // R/W #define SYS_VGA_BLIT_SRC0_DIMX (SYS_IO_BASE + 0x30024) // R/W #define SYS_VGA_BLIT_SRC1_ADDR (SYS_IO_BASE + 0x30030) // R/W #define SYS_VGA_BLIT_SRC1_DIMX (SYS_IO_BASE + 0x30034) // R/W #define SYS_VGA_BLIT_DST_ADDR (SYS_IO_BASE + 0x30040) // R/W #define SYS_VGA_BLIT_DST_DIMX (SYS_IO_BASE + 0x30044) // R/W #define SYS_VGA_BLIT_NX (SYS_IO_BASE + 0x30050) // R/W #define SYS_VGA_BLIT_NY (SYS_IO_BASE + 0x30054) // R/W #define SYS_VGA_BLIT_COLOR (SYS_IO_BASE + 0x30058) // R/W // AC'97 #define SYS_AC97_STAT (SYS_IO_BASE + 0x40000) #define SYS_AC97_CTRL (SYS_IO_BASE + 0x40000) #define SYS_AC97_ACSTAT (SYS_IO_BASE + 0x40400) #define SYS_AC97_ACCTRL (SYS_IO_BASE + 0x40600) #define SYS_AC97_PCM (SYS_IO_BASE + 0x40800) #define SYS_AC97_WAVIN SYS_AC97_PCM #define SYS_AC97_WAVOUT SYS_AC97_PCM // Ethernet MAC #define SYS_EMAC_RX_CTRL (SYS_IO_BASE + 0x50000) #define EMAC_RX_CTRL_RESET (1 << 31) #define EMAC_RX_CTRL_GIGABIT (1 << 30) #define EMAC_RX_CTRL_FCS_CHECK (1 << 29) #define EMAC_RX_CTRL_PROMISCIOUS (1 << 23) #define EMAC_RX_CTRL_PKT_REQ (1 << 17) #define EMAC_RX_CTRL_PKT_FREE (1 << 16) #define EMAC_RX_CTRL_INTEN (1 << 4) #define SYS_EMAC_RX_STAT SYS_EMAC_RX_CTRL #define EMAC_RX_STAT_RESET (1 << 31) #define EMAC_RX_STAT_GIGABIT (1 << 30) #define EMAC_RX_STAT_FCS_CHECK (1 << 29) #define EMAC_RX_STAT_PROMISCIOUS (1 << 23) #define EMAC_RX_STAT_PKT_BCAST (1 << 19) #define EMAC_RX_STAT_PKT_MACOK (1 << 18) #define EMAC_RX_STAT_PKT_VALID (1 << 17) #define EMAC_RX_STAT_PKT_AVAIL (1 << 16) #define EMAC_RX_STAT_INTEN (1 << 4) #define SYS_EMAC_RX_SIZE (SYS_IO_BASE + 0x50004) #define SYS_EMAC_TX_CTRL (SYS_IO_BASE + 0x50008) #define EMAC_TX_CTRL_RESET (1 << 31) #define EMAC_TX_CTRL_GIGABIT (1 << 30) #define EMAC_TX_CTRL_FCS_APPEND (1 << 29) #define EMAC_TX_CTRL_PKT_ALLOC (1 << 17) #define EMAC_TX_CTRL_PKT_COMMIT (1 << 16) #define EMAC_TX_CTRL_INTEN (1 << 4) #define SYS_EMAC_TX_STAT SYS_EMAC_TX_CTRL #define EMAC_TX_STAT_RESET (1 << 31) #define EMAC_TX_STAT_GIGABIT (1 << 30) #define EMAC_TX_STAT_FCS_APPEND (1 << 29) #define EMAC_TX_STAT_PKT_DONE (1 << 24) #define EMAC_TX_STAT_PKT_ALLOC_BSY (1 << 17) #define EMAC_TX_STAT_PKT_ARMED (1 << 16) #define EMAC_TX_STAT_INTEN (1 << 4) #define SYS_EMAC_TX_SIZE (SYS_IO_BASE + 0x5000C) #define SYS_EMAC_MADDR (SYS_IO_BASE + 0x50018) #define SYS_EMAC_MADDR_0 SYS_EMAC_MADDR_0 #define SYS_EMAC_MADDR_1 (SYS_IO_BASE + 0x5001C) #define SYS_EMAC_DATA (SYS_IO_BASE + 0x58000) #define SYS_EMAC_RX_DATA SYS_EMAC_DATA #define SYS_EMAC_TX_DATA SYS_EMAC_DATA #define SYS_EMAC_DATA_CACHED (SYS_IO_BASE + 0x10008000) // Sync. SRAM #define SYS_SSRAM_IO 0xA8000000 // --------------------------------------------------------- // Chip registers // --------------------------------------------------------- // COP0 registers #define COP0_REG_INVAT_POINTER 31 // COP0 instructions #define COP0_INSTR_INVALL_ICACHE 32 #define COP0_INSTR_INVAT_ICACHE 33 #define COP0_INSTR_INVALL_DCACHE 34 #define COP0_INSTR_INVAT_DCACHE 35 #define CP0_read(idx) \ ({ \ uint32_t result; \ __asm__ __volatile__ \ ( \ "mfc0\t%0,$"#idx"\n" \ : "=r" (result) \ ); \ result; \ }) #define CP0_write(idx, val) \ ({ \ __asm__ __volatile__ \ ( \ "mtc0\t%0,$"#idx"\n" \ "nop\n" \ : /* no output */ \ : "r" (val) \ ); \ }) #define CP0_TLBR \ ({ \ __asm__ __volatile__ \ ( \ "tlbr\n" \ : /* no output */ \ : /* no input */ \ ); \ }) #define CP0_TLBWI \ ({ \ __asm__ __volatile__ \ ( \ "tlbwi\n" \ : /* no output */ \ : /* no input */ \ ); \ }) uint32_t CP0_SR_read(void); void CP0_SR_write(uint32_t val); uint32_t CP0_CR_read(void); void CP0_CR_write(uint32_t val); uint32_t CP0_PRID_read(void); uint32_t CP0_TR_read(void); void CP0_TR_write(uint32_t val); void CP0_TR_write_ptr(uint32_t* pPtr); void CP0_TR_read_ptr(uint32_t* pPtr); void ICACHE_invalidate_all(void); void ICACHE_invalidate_at(uint32_t* pPtr); void DCACHE_invalidate_all(void); void DCACHE_invalidate_at(uint32_t* pPtr); #define CALC_BAUD(b) \ ((uint32_t)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1); #define UART0_setbaud(b) \ *((uint32_t*)SYS_UART0_BAUD) = CALC_BAUD(b); #define UART1_setbaud(b) \ *((uint32_t*)SYS_UART1_BAUD) = CALC_BAUD(b); #define UART2_setbaud(b) \ *((uint32_t*)SYS_UART2_BAUD) = CALC_BAUD(b); char readchar(uint32_t port); void writechar(uint32_t port, char c); int write(int file, char *ptr, int len); int sputs(char const *pStr); void print_byte(char byte); void print_word(int word); void _exit (int exitcode); void sleep(unsigned ms); void usleep(unsigned us); char _getchar(void); void PrintBuffer8(uint8_t *pBuf, int nbpr, int len); void memdump(uint8_t *pBuf, int print_offset_only, int num_bytes_per_row, int len); void Screen_clr(void); void Screen_line_clr(void); void Screen_csr_set_x(uint32_t coord); void Screen_csr_set_y(uint32_t coord); uint32_t Screen_get_resx(void); uint32_t Screen_get_resy(void); uint32_t Screen_get_fps(void); #endif // LIBSYS_H